US5068661A
Expired / Lapsed
US
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Multi-stage noise shaping over-sampling d/a converter
Assignee: Panasonic Holdings Corp
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Filing: 1988-09-13
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Granted: 1991-11-26
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Expires: 2008-09-13
Abstract
Abstract A noise shaping quantization D/A converter in which an input digital signal is supplied to a single-integration sigma delta modulation circuit having quantization levels which include zero level, with a quantization error signal from the single-integration circuit being supplied to a double-integration noise shaping quantization circuit having quantization levels which also include zero level, and an output signal from the double-integration circuit being differentiated and summed with the single-integration circuit output to obtain a bit-compressed digital signal for D/A conversion. Offset of the analog output signal during a zero hold status of the input digital signal is eliminated, and increased efficiency of supply voltage utilization is attained, together with increased S/N ratio.
Inventors
- 👤 Tetsuhiko Kaneaki
- 👤 Kozo Nuriya
- 👤 Yasunori Tani
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 01:03
CPC Classifications
H; H03; H03M; H03M3/00; H03M3/30; H03M3/39; H03M3/412; H03M3/414; H03M3/418
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
231 words
An over-sampling digital-to-analog converter, comprising: a noise shaping quantization circuit coupled to receive a digital signal as input, for producing a quantized output signal; a digital-to-analog conversion circuit for converting said quantized output signal to an analog signal; wherein said noise shaping quantization circuit has final quantization levels of -L, -(L-1), . . . , -1, 0, +1, . . . , +(L-1), +L, where L is a positive integer, and in which said noise shaping quantization circuit comprises: a single-integration sigma delta modulation circuit coupled to receive said input digital signal; a double-integration sigma delta modulation circuit coupled to receive a quantization error signal produced from said single-integration sigma delta modulation circuit; differentiator means for differentiation an output signal produced from said double-integration sigma delta modulation circuit; and, adder means for summing an output signal produced from said differentiator means and an output signal produced from said single-integration sigma delta modulation circuit; wherein said digital-to-analog conversion circuit converts a sum output signal produced from said adder means to an analog signal, and wherein said single-integration sigma delta modulation circuit has quantization levels of -N, -(N-1), . . . , -1, 0, +(N-1), +N, where N is a positive integer, and said double-integration sigma delta modulation circuit has quantization levels of -M, -(M-1), . . . , -1, 0, +M, where M is a positive integer which is less than N.
Claim 2
Dependent Claim
231 words
An over-sampling digital-to-analog converter, comprising: a noise shaping quantization circuit coupled to receive a digital signal as input, for producing a quantized output signal; a digital-to-analog conversion circuit for converting said quantized output signal to an analog signal; wherein said noise shaping quantization circuit has final quantization levels of -L, -(L-1), . . . , -1, 0, +1, . . . , +(L-1), +L, where L is a positive integer, and in which said noise shaping quantization circuit comprises: a single-integration sigma delta modulation circuit coupled to receive said input digital signal; a double-integration sigma delta modulation circuit coupled to receive a quantization error signal produced from said single-integration sigma delta modulation circuit; differentiator means for differentiation an output signal produced from said double-integration sigma delta modulation circuit; and, adder means for summing an output signal produced from said differentiator means and an output signal produced from said single-integration sigma delta modulation circuit; wherein said digital-to-analog conversion circuit converts a sum output signal produced from said adder means to an analog signal, and wherein said single-integration sigma delta modulation circuit has quantization levels of -N, -(N-1), . . . , -1, 0, +(N-1), +N, where N is a positive integer, and said double-integration sigma delta modulation circuit has quantization levels of -M, -(M-1), . . . , -1, 0, +M, where M is a positive integer which is less than N.
Claim 3
Dependent Claim
218 words
An over-sampling digital-to-analog converter comprising: a noise shaping quantization circuit coupled to receive a digital signal as input, for producing a quantized output signal; and, a digital-to-analog conversion circuit for converting said quantized output signal to an analog signal; wherein said noise shaping quantization circuit has final quantization levels of -L, -(L-1), . . . , -1, 0, +1, . . . , +(L+1), +L, where L is a positive integer having a value greater than one, and in which said noise shaping quantization circuit comprises: a first single-integration sigma delta modulation circuit coupled to receive said input digital signal; a second single-integration sigma delta modulation circuit coupled to receive a quantization error signal produced form said first single-integration sigma delta modulation circuit; differentiator means for differentiating an output signal produced from said second single-integration sigma delta modulation circuit; and, adder means for summing an output signal produced form said differentiator means and an output signal produced form said first single-integration sigma delta modulation circuit; wherein said digital-to-analog conversion circuit converts a sum output signal produced from said adder means to an analog signal, and wherein said first single-integration sigma delta modulation circuit has quantization levels of -N, -(N-1), . . . , -1, 0, +1, . . . , +(N-1), +N where N is a positive integer.
Claim 4
Dependent Claim
218 words
An over-sampling digital-to-analog converter comprising: a noise shaping quantization circuit coupled to receive a digital signal as input, for producing a quantized output signal; and, a digital-to-analog conversion circuit for converting said quantized output signal to an analog signal; wherein said noise shaping quantization circuit has final quantization levels of -L, -(L-1), . . . , -1, 0, +1, . . . , +(L+1), +L, where L is a positive integer having a value greater than one, and in which said noise shaping quantization circuit comprises: a first single-integration sigma delta modulation circuit coupled to receive said input digital signal; a second single-integration sigma delta modulation circuit coupled to receive a quantization error signal produced form said first single-integration sigma delta modulation circuit; differentiator means for differentiating an output signal produced from said second single-integration sigma delta modulation circuit; and, adder means for summing an output signal produced form said differentiator means and an output signal produced form said first single-integration sigma delta modulation circuit; wherein said digital-to-analog conversion circuit converts a sum output signal produced from said adder means to an analog signal, and wherein said first single-integration sigma delta modulation circuit has quantization levels of -N, -(N-1), . . . , -1, 0, +1, . . . , +(N-1), +N where N is a positive integer.
Claim 5
Dependent Claim
131 words
An over-sampling digital-to-analog converter comprising: a single-integration sigma delta modulation circuit coupled to receive a digital input signal; a double-integration sigma delta modulation circuit coupled to receive a quantization error signal produced form said single-integration sigma delta modulation circuit; differentiator means for differentiating an output signal produced from said double-integration sigma delta modulation circuit; and adder means for summing an output signal produced from said differentiator means and an output signal produced from said single-integration sigma delta modulation circuit; wherein said digital-to-analog conversion circuit converts a sum output signal produced from said adder means to an analog signal, and wherein said single-integration sigma delta modulation circuit has quantization levels of -N, -(N-1), . . . , -1, 0, -1, . . . , +(N-1), +N where N is a positive integer.
Claim 6
Dependent Claim
131 words
An over-sampling digital-to-analog converter comprising: a single-integration sigma delta modulation circuit coupled to receive a digital input signal; a double-integration sigma delta modulation circuit coupled to receive a quantization error signal produced form said single-integration sigma delta modulation circuit; differentiator means for differentiating an output signal produced from said double-integration sigma delta modulation circuit; and adder means for summing an output signal produced from said differentiator means and an output signal produced from said single-integration sigma delta modulation circuit; wherein said digital-to-analog conversion circuit converts a sum output signal produced from said adder means to an analog signal, and wherein said single-integration sigma delta modulation circuit has quantization levels of -N, -(N-1), . . . , -1, 0, -1, . . . , +(N-1), +N where N is a positive integer.
Claim 7
Dependent Claim
123 words
An over-sampling digital-to-analog converter comprising: a single-integration sigma delta modulation circuit coupled to receive a digital input signal; a double-integration sigma delta modulation circuit coupled to receive a quantization error signal produced form said single-integration sigma delta modulation circuit; differentiator means for differentiating an output signal produced from said double-integration sigma delta modulation circuit; and adder means for summing an output signal produced from said differentiator means and an output signal produced from said single-integration sigma delta modulation circuit; wherein said digital-to-analog conversion circuit converts a sum output signal produced from said adder means to an analog signal, and wherein said single-integration sigma delta modulation circuit has quantization levels of -3N, -2N, -1N, 0, +1N, +2N, +3N, where N is a positive integer.
Claim 8
Dependent Claim
123 words
An over-sampling digital-to-analog converter comprising: a single-integration sigma delta modulation circuit coupled to receive a digital input signal; a double-integration sigma delta modulation circuit coupled to receive a quantization error signal produced form said single-integration sigma delta modulation circuit; differentiator means for differentiating an output signal produced from said double-integration sigma delta modulation circuit; and adder means for summing an output signal produced from said differentiator means and an output signal produced from said single-integration sigma delta modulation circuit; wherein said digital-to-analog conversion circuit converts a sum output signal produced from said adder means to an analog signal, and wherein said single-integration sigma delta modulation circuit has quantization levels of -3N, -2N, -1N, 0, +1N, +2N, +3N, where N is a positive integer.
Claim 9
Dependent Claim
240 words
An over-sampling digital-to-analog converter comprising: a single-integration sigma delta modulation circuit coupled to receive a digital input signal; a double-integration sigma delta modulation circuit coupled to receive a quantization error signal produced form said single-integration sigma delta modulation circuit; differentiator means for differentiating an output signal produced from said double-integration sigma delta modulation circuit; and adder means for summing an output signal produced from said differentiator means and an output signal produced from said single-integration sigma delta modulation circuit; wherein said digital-to-analog conversion circuit converts a sum output signal produced from said adder means to an analog signal, and wherein said single-integration sigma delta modulation circuit has quantization levels of -3, -2, -1, 0, +1, +2, +3, and wherein a minimum positive threshold value Y for quantization of said input digital signal by said single-integration sigma delta modulation circuit is established as R/6, where R is an integral multiple of 6 and is greater than a maximum positive value with respect o zero of said input digital signal, and in which threshold values of said single-integration sigma delta modulation circuit feedback signal respectively corresponding to said quantization levels of said single-integration sigma delta modulation circuit are established as -5Y, -3Y, -Y, +Y, +3Y, +5Y, and moreover in which feedback signal levels of said sigma delta modulation circuit respectively corresponding to said quantization levels of said single-integration sigma delta modulation circuit are established as -6Y, -4Y, -2Y, 0, +2Y, +4Y, +6Y.
Claim 10
Dependent Claim
240 words
An over-sampling digital-to-analog converter comprising: a single-integration sigma delta modulation circuit coupled to receive a digital input signal; a double-integration sigma delta modulation circuit coupled to receive a quantization error signal produced form said single-integration sigma delta modulation circuit; differentiator means for differentiating an output signal produced from said double-integration sigma delta modulation circuit; and adder means for summing an output signal produced from said differentiator means and an output signal produced from said single-integration sigma delta modulation circuit; wherein said digital-to-analog conversion circuit converts a sum output signal produced from said adder means to an analog signal, and wherein said single-integration sigma delta modulation circuit has quantization levels of -3, -2, -1, 0, +1, +2, +3, and wherein a minimum positive threshold value Y for quantization of said input digital signal by said single-integration sigma delta modulation circuit is established as R/6, where R is an integral multiple of 6 and is greater than a maximum positive value with respect o zero of said input digital signal, and in which threshold values of said single-integration sigma delta modulation circuit feedback signal respectively corresponding to said quantization levels of said single-integration sigma delta modulation circuit are established as -5Y, -3Y, -Y, +Y, +3Y, +5Y, and moreover in which feedback signal levels of said sigma delta modulation circuit respectively corresponding to said quantization levels of said single-integration sigma delta modulation circuit are established as -6Y, -4Y, -2Y, 0, +2Y, +4Y, +6Y.
Claim 11
Dependent Claim
24 words
An over-sampling digital-to-analog converter according to claim 5, in which said double-integration sigma delta modulation circuit has quantization levels of -1, 0 and +1.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-11-25 | 1995-05-27 | 1995-11-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-11-25 | 1999-05-27 | 1999-11-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-11-25 | 2003-05-27 | 2003-11-26 | $7700.00 | Window Closed / Lapsed |