US5068625A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for fast frequency acquisition in a phase locked loop
Assignee: Motorola Solutions Inc
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Filing: 1990-12-14
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Granted: 1991-11-26
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Expires: 2010-12-14
Abstract
Abstract The method of the present invention provides fast frequency acquisition in a PLL. The peak voltage for a phase error signal is detected at time t p and a voltage controlled oscillator warp voltage is sampled at t p . The new warp voltage to the voltage controlled oscillator is set to what the warp voltage was at t p . The bandwidth of the loop is then narrowed and the warp voltage is averaged over a number of samples. The warp voltage is then set to the average warp voltage and the loop bandwidth is widened.
Inventors
- 👤 James C. Baker
- 👤 Michael J. Carney
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 16:33
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
84 words
A method for frequency acquisition in a phase locked loop having a phase error signal and a voltage controlled oscillator that outputs a variable frequency signal in response to a control voltage, the method comprising the steps of: a) detecting a peak voltage, at a time t p , for the phase error signal; b) sampling the control voltage at the time t p ; and c) resetting the control voltage substantially equal to the sampled control voltage at the time t p .
Claim 2
Independent Claim
84 words
A method for frequency acquisition in a phase locked loop having a phase error signal and a voltage controlled oscillator that outputs a variable frequency signal in response to a control voltage, the method comprising the steps of: a) detecting a peak voltage, at a time t p , for the phase error signal; b) sampling the control voltage at the time t p ; and c) resetting the control voltage substantially equal to the sampled control voltage at the time t p .
Claim 3
Dependent Claim
43 words
The method of claim 1 and further including the steps of reducing the phase locked loop bandwidth, averaging the control voltage for a predetermined time to produce an average control voltage, and setting the control voltage substantially equal to the average control voltage.
Claim 4
Dependent Claim
16 words
The method of claim 1 wherein the peak voltage is detected by differentiating the control voltage.
Claim 5
Independent Claim
117 words
A method for frequency acquisition in a phase locked loop having a phase error signal and a voltage controlled oscillator that outputs a variable frequency signal in response to a control voltage, the method comprising the steps of: a) detecting a peak voltage, at a time t p , for the phase error signal; b) sampling the control voltage at the time t p ; c) setting the control voltage substantially equal to the control voltage at the time t p ; d) reducing the phase locked loop bandwidth; e) averaging the control voltage for a predetermined time to produce an average control voltage; and f) setting the control voltage substantially equal to the average control voltage.
Claim 6
Independent Claim
117 words
A method for frequency acquisition in a phase locked loop having a phase error signal and a voltage controlled oscillator that outputs a variable frequency signal in response to a control voltage, the method comprising the steps of: a) detecting a peak voltage, at a time t p , for the phase error signal; b) sampling the control voltage at the time t p ; c) setting the control voltage substantially equal to the control voltage at the time t p ; d) reducing the phase locked loop bandwidth; e) averaging the control voltage for a predetermined time to produce an average control voltage; and f) setting the control voltage substantially equal to the average control voltage.
Claim 7
Independent Claim
183 words
A method for frequency acquisition in a phase locked loop having a phase error signal and a voltage controlled oscillator that outputs a variable frequency signal in response to a control voltage, the method comprising the steps of: a) resetting a count to zero; b) incrementing the count; c) sampling a first error voltage, at a time t 1 , for the phase error signal; d) saving the first error voltage; e) sampling a first control voltage at the time t 1 ; f) saving the first control voltage; g) sampling a subsequent error voltage, at a time t 2 , for the phase error signal; h) sampling a second control voltage at the time t 2 ; i) comparing the subsequent error voltage to the first error voltage; j) if the subsequent error voltage is greater than the first error voltage, saving the subsequent error voltage, the second control voltage, and repeating from step a; k) if the count is less than a predetermined count, repeating from step b; and l) setting the control voltage substantially equal to the second control voltage.
Claim 8
Independent Claim
183 words
A method for frequency acquisition in a phase locked loop having a phase error signal and a voltage controlled oscillator that outputs a variable frequency signal in response to a control voltage, the method comprising the steps of: a) resetting a count to zero; b) incrementing the count; c) sampling a first error voltage, at a time t 1 , for the phase error signal; d) saving the first error voltage; e) sampling a first control voltage at the time t 1 ; f) saving the first control voltage; g) sampling a subsequent error voltage, at a time t 2 , for the phase error signal; h) sampling a second control voltage at the time t 2 ; i) comparing the subsequent error voltage to the first error voltage; j) if the subsequent error voltage is greater than the first error voltage, saving the subsequent error voltage, the second control voltage, and repeating from step a; k) if the count is less than a predetermined count, repeating from step b; and l) setting the control voltage substantially equal to the second control voltage.
Claim 9
Dependent Claim
45 words
The method of claim 5 and further including the steps of reducing the bandwidth of the phase locked loop, averaging the control voltage for a predetermined time to produce and average control voltage, and setting the control voltage substantially equal to the average control voltage.
References Cited (Backward Citations)
US4972160A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-11-25 | 1995-05-27 | 1995-11-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-11-25 | 1999-05-27 | 1999-11-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-11-25 | 2003-05-27 | 2003-11-26 | $7700.00 | Window Closed / Lapsed |