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US5065243A
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US
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Multi-screen high-definition television receiver
Assignee: Toshiba Corp
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Filing: 1990-08-15
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Granted: 1991-11-12
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Expires: 2010-08-15
Abstract
Abstract Current television signals are converted into sequential scanning signals in a sequential scanning conversion circuit and supplied to a memory circuit. In the memory circuit, the sequential scanning signals are converted into interlaced scanning signals, and then the signals are time-compressed and converted into small screen signals. High-definition television signals decoded by a MUSE decoder are supplied to a selector as master screen signals. In the selector, the master and slave screen signals are selectively produced to form a picture-in-picture signal.
Inventors
- 👤 Takato Katagiri
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 20:28
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/44; H04N5/445; H04N5/45; H04N7/00; H04N7/01
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
154 words
A multi-screen high-definition television receiver comprising: first means for receiving and demodulating a first interlaced scanning television signal; second means for receiving and demodulating a second interlaced scanning television signal whose scanning lines are about twice as many as that of the first interlaced scanning television signal; sequential scanning conversion means for converting the first interlaced scanning television signal output from said first means into a sequential scanning television signal; memory means for synchronizing the sequential scanning television signal output from said sequential scanning conversion means with a field frequency of the second interlaced scanning television signal, time-compressing the sequential scanning television signal and, converting the sequential scanning television signal into a third interlaced scanning television signal in accordance with even and odd fields of the second interlaced scanning television signal; and means for selectively producing a fourth interlaced scanning television signal output from said memory means and the second interlaced scanning television signal.
Claim 2
Dependent Claim
154 words
A multi-screen high-definition television receiver comprising: first means for receiving and demodulating a first interlaced scanning television signal; second means for receiving and demodulating a second interlaced scanning television signal whose scanning lines are about twice as many as that of the first interlaced scanning television signal; sequential scanning conversion means for converting the first interlaced scanning television signal output from said first means into a sequential scanning television signal; memory means for synchronizing the sequential scanning television signal output from said sequential scanning conversion means with a field frequency of the second interlaced scanning television signal, time-compressing the sequential scanning television signal and, converting the sequential scanning television signal into a third interlaced scanning television signal in accordance with even and odd fields of the second interlaced scanning television signal; and means for selectively producing a fourth interlaced scanning television signal output from said memory means and the second interlaced scanning television signal.
Claim 3
Dependent Claim
191 words
A multi-screen high-definition television receiver according to claim 1, wherein said sequential scanning conversion means comprises: a first speed change converter for changing a speed of a scanning line of the first television signal; a first field memory for delaying the first television signal for one field period; a second field memory for delaying the first television signal for one field period; a one horizontal period delay circuit for delaying the first television signal for one horizontal period; an adder for adding the input and output signals of the one horizontal period delay circuit; a motion detector for detecting a part of a motion image of the first television signal by using the input of the first field memory and the output of the second field memory; a mixture circuit for mixing the outputs from the first field memory and the adder in the mixing ratio of these outputs according to the motion detection signal; a second speed change converter for changing a speed of a scanning line of the output of the mixture circuit; and a selector for alternately selecting the outputs of the first and second speed change converters.
References Cited (Backward Citations)
JPS63200681A
Cited
US4982288A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-11-11 | 1995-05-13 | 1995-11-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-11-11 | 1999-05-13 | 1999-11-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-11-11 | 2003-05-13 | 2003-11-12 | $7700.00 | Window Closed / Lapsed |