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US5065148A Expired / Lapsed US ⏱️ 0.0 years remaining

LCD driver a generator

Assignee: Motorola Solutions Inc
•
Filing: 1989-07-31
•
Granted: 1991-11-12
•
Expires: 2009-07-31
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Abstract

Abstract A method of providing IC layouts for a family of LCD drivers including the steps of separating the driver into a front end section and a driver section, determining the number of backplanes and frontplanes and the number and size of voltage levels required, generating a resistor ladder voltage generator with the required number and size of levels, generating individual cell layouts for each of the major components, and building pitch matched layouts of the components from the cells.

Inventors

  • 👤 Timothy K. Yee-Kwong

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 23:42
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/20; G09G3/34; G09G3/36; G09G3/3611; G09G3/3674; G09G3/3681; G09G3/3685; G09G3/3692; G09G3/3696

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 307 words
A method of providing an IC layout for an LCD driver comprising the steps of: selecting a specific type of LCD to be driven; separating the LCD driver into a front end section including a RAM, address decoder and control logic, and a driver section including frontplane and backplane drivers and a voltage generator; determining, from the selected specific type of LCD, the number of frontplane and backplane drivers to be included in the RAM; selecting frame and clock frequencies; determining a number of psuedo-voltage levels to be generated by the voltage generator using the equation ##EQU3## and determining the value of each psuedo-voltage level using the equations: V.sub.0 =0 V.sub.1 =V.sub.lcd /a V.sub.2 =2 V.sub.lcd /a V.sub.3 =(1-2/a)V.sub.lcd V.sub.4 =(1-1/a)V.sub.lcd V.sub.5 =V.sub.lcd where: a=No. of levels--1; and Vlcd=supply voltage applied to the driver section; developing a resistor ladder to provide the determined voltage levels and gates to provide waveforms that will properly activate the selected LCD; developing a layout of a driver cell and forming frontplane and backplane drivers from the driver cell layout; developing a layout of a RAM cell, measuring the height and width of the RAM cell and forming a RAM from the layout of the RAM cell, with the RAM having a required number of RAM cells to provide information to selected backplane and frontplane drivers; developing an address decoder for writing data in the RAM, said decoder including a plurality of decoder cells, with the decoder cells being pitch matched to one of the height and width of the layout of the RAM cells; developing a control circuit including a plurality of control cells, with the control cells being pitch matched to one of the height and width of the layout of the RAM cells; and connecting all of the layouts of the components to produce an LCD driver IC layout.
Claim 2
Independent Claim 307 words
A method of providing an IC layout for an LCD driver comprising the steps of: selecting a specific type of LCD to be driven; separating the LCD driver into a front end section including a RAM, address decoder and control logic, and a driver section including frontplane and backplane drivers and a voltage generator; determining, from the selected specific type of LCD, the number of frontplane and backplane drivers to be included in the RAM; selecting frame and clock frequencies; determining a number of psuedo-voltage levels to be generated by the voltage generator using the equation ##EQU3## and determining the value of each psuedo-voltage level using the equations: V.sub.0 =0 V.sub.1 =V.sub.lcd /a V.sub.2 =2 V.sub.lcd /a V.sub.3 =(1-2/a)V.sub.lcd V.sub.4 =(1-1/a)V.sub.lcd V.sub.5 =V.sub.lcd where: a=No. of levels--1; and Vlcd=supply voltage applied to the driver section; developing a resistor ladder to provide the determined voltage levels and gates to provide waveforms that will properly activate the selected LCD; developing a layout of a driver cell and forming frontplane and backplane drivers from the driver cell layout; developing a layout of a RAM cell, measuring the height and width of the RAM cell and forming a RAM from the layout of the RAM cell, with the RAM having a required number of RAM cells to provide information to selected backplane and frontplane drivers; developing an address decoder for writing data in the RAM, said decoder including a plurality of decoder cells, with the decoder cells being pitch matched to one of the height and width of the layout of the RAM cells; developing a control circuit including a plurality of control cells, with the control cells being pitch matched to one of the height and width of the layout of the RAM cells; and connecting all of the layouts of the components to produce an LCD driver IC layout.
Claim 3
Dependent Claim 68 words
A method of providing an IC layout as claimed in claim 1 including the steps of including voltage translators in the front end section and developing the voltage translators for making the operating voltage of the driver section compatible with the operating voltage of the front end section, the voltage translators being pitch matched to one of the height and width of the layout of the RAM cells.
Claim 4
Dependent Claim 47 words
A method of providing an IC layout as claimed in claim 1 wherein the steps of developing the layout of a RAM cell, developing an address decoder, developing a control circuit and connecting the layouts of all components is accomplished with the use of a silicon compiler.
Claim 5
Dependent Claim 134 words
A method of providing an IC layout as claimed in claim 1 wherein the step of developing the layout of a driver cell and developing frontplane and backplane drivers from the driver cell layout includes the step of designing the frontplane and backplane drivers for generating frontplane and backplane, select and non-select square-waves by continually switching between two psuedo-voltage levels as given by: V fps switches between V 5 and V 0 ; V fpns switches between V 3 and V 2 ; V bps switches between V 0 and V 5 ; and V bpns switches between V 4 and V 1 where: V fps =frontplane select square-wave; V fpns =frontplane non-select square-wave; V bps =backplane select square-wave; and V bpns =backplane non-select square-wave and multiplexing these square-waves to frontplane and backplane outputs.
Claim 6
Dependent Claim 269 words
An LCD driver for driving a selected LCD comprising: a front end section including a RAM, address decoder, and control logic interconnected to provide operating signals, and a driver section including frontplane and backplane drivers with outputs and a voltage generator interconnected to each other and to said front end section and further connected to provide LCD driving signals; the RAM including a plurality of frontplane columns and a plurality of backplane rows, the pluralities being chosen to provide a required number of signals to the selected LCD utilizing a reduced number of connections; the voltage generator including a resistor ladder constructed to generate a plurality of psuedo-voltage levels in accordance with the equation ##EQU4## and the value of the voltage at each psuedo-voltage level corresponding to the following equations V.sub.0 =0 V.sub.1 =V.sub.lcd /a V.sub.2 =2 V.sub.lcd /a V.sub.3 =(1-2/a)V.sub.lcd V.sub.4 =(1-1/a)V.sub.lcd V.sub.5 =V.sub.lcd where: a=No. of level--1; and V lcd =supply voltage applied to the driver section; and said frontplane and backplane drivers being connected to receive the plurality of psuedo-voltage levels from said voltage generator and generating frontplane and backplane, select and non-select square-waves by continually switching between two psuedo-voltage levels as given by: V fps switches between V 5 and V 0 ; V fpns switches between V 3 and V 2 ; V bps switches between V 0 and V 5 ; and V bpns switches between V 4 and V 1 where: V fps =frontplane select square-wave; V fpns =frontplane non-select square-wave; V bps =backplane select square-wave; and V bpns =backplane non-select square-wave and multiplexing the generated square-waves to frontplane and backplane outputs.
Claim 7
Dependent Claim 269 words
An LCD driver for driving a selected LCD comprising: a front end section including a RAM, address decoder, and control logic interconnected to provide operating signals, and a driver section including frontplane and backplane drivers with outputs and a voltage generator interconnected to each other and to said front end section and further connected to provide LCD driving signals; the RAM including a plurality of frontplane columns and a plurality of backplane rows, the pluralities being chosen to provide a required number of signals to the selected LCD utilizing a reduced number of connections; the voltage generator including a resistor ladder constructed to generate a plurality of psuedo-voltage levels in accordance with the equation ##EQU4## and the value of the voltage at each psuedo-voltage level corresponding to the following equations V.sub.0 =0 V.sub.1 =V.sub.lcd /a V.sub.2 =2 V.sub.lcd /a V.sub.3 =(1-2/a)V.sub.lcd V.sub.4 =(1-1/a)V.sub.lcd V.sub.5 =V.sub.lcd where: a=No. of level--1; and V lcd =supply voltage applied to the driver section; and said frontplane and backplane drivers being connected to receive the plurality of psuedo-voltage levels from said voltage generator and generating frontplane and backplane, select and non-select square-waves by continually switching between two psuedo-voltage levels as given by: V fps switches between V 5 and V 0 ; V fpns switches between V 3 and V 2 ; V bps switches between V 0 and V 5 ; and V bpns switches between V 4 and V 1 where: V fps =frontplane select square-wave; V fpns =frontplane non-select square-wave; V bps =backplane select square-wave; and V bpns =backplane non-select square-wave and multiplexing the generated square-waves to frontplane and backplane outputs.
Claim 8
Dependent Claim 41 words
An LCD driver as claimed in claim 5 including in addition voltage translators in the front end section constructed to translate operating voltages so that operating voltages of the driver section are compatible with operating voltages of the front end section.
Claim 9
Dependent Claim 50 words
An LCD driver as claimed in claim 6 wherein the RAM includes a plurality of similarly constructed cells alternately positioned to interconnect with a minimum length of connecting leads, the cells being positioned in rows and columns determined by the plurality of frontplane drivers and the plurality of backplane drivers.
Claim 10
Dependent Claim 30 words
An LCD driver as claimed in claim 7 wherein the voltage translators, the address decoder and the control logic are positioned adjacent to and pitch matched with the RAM cells.

References Cited (Backward Citations)

US3765747A Cited
US4271410A Cited
US4773716A Cited
US4921334A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-11-11 1995-05-13 1995-11-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-11-11 1999-05-13 1999-11-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-11-11 2003-05-13 2003-11-12 $7700.00 Window Closed / Lapsed

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