US5065047A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital circuit including fail-safe circuit
Assignee: Nissan Motor Co Ltd
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Filing: 1990-03-27
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Granted: 1991-11-12
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Expires: 2010-03-27
Abstract
Abstract A digital circuit including a processor operated in synchronization with a clock signal to output a control signal to be fed to an actuator, in which a converter converts a period of frequency of the clock signal to an analog voltage value, and a comparator compares whether or not the analog voltage value is within a reference value range to output a comparison signal, and in which a holding device allows the control signal to pass or stop to the actuator on the basis of the comparison signal.
Inventors
- 👤 Yuichi Igari
- 👤 Masahiro Ishikawa
- 👤 Mitsuo Kaneko
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 17:54
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/0038
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
109 words
A digital circuit, comprising: a processor which is operated in synchronization with a clock signal and outputs a control signal to be fed to an actuator; converter means for converting a period or frequency of the clock signal to an analog voltage value; comparator means for comparing whether or not the analog voltage value is within a reference value range to output a comparison signal; and gate means, connected to the processor and the comparator means, for outputting either the control signal or a fail-safe signal for holding the control signal of the processor to a predetermined fail-safe side to the actuator on the basis of the comparison signal.
Claim 2
Dependent Claim
109 words
A digital circuit, comprising: a processor which is operated in synchronization with a clock signal and outputs a control signal to be fed to an actuator; converter means for converting a period or frequency of the clock signal to an analog voltage value; comparator means for comparing whether or not the analog voltage value is within a reference value range to output a comparison signal; and gate means, connected to the processor and the comparator means, for outputting either the control signal or a fail-safe signal for holding the control signal of the processor to a predetermined fail-safe side to the actuator on the basis of the comparison signal.
Claim 3
Dependent Claim
41 words
The circuit of claim 1, wherein the converter means includes an AND circuit, a transistor device connected to the AND circuit, a capacitor connected to the transistor device and a current source device for supplying a constant current to the capacitor.
Claim 4
Dependent Claim
13 words
The circuit of claim 2, wherein the current source includes a transistor device.
Claim 5
Dependent Claim
28 words
The circuit of claim 1, wherein the comparator means includes first and second comparator devices for comparing the analog voltage value with high and low reference values, respectively.
Claim 6
Dependent Claim
23 words
The circuit of claim 4, wherein each of the first and second comparator devices includes a comparator and a flip flop connected thereto.
Claim 7
Dependent Claim
12 words
The circuit of claim 1, wherein the gate means includes AND circuits.
Claim 8
Dependent Claim
121 words
A digital circuit, comprising: ordering circuit means operated in synchronization with a first clock signal; shift register means connected to the ordering circuit means, the shift register means having at least two stages operated by second and third clock signals having respective periods to output an output signal, and having time constants larger than those of the periods of the second and third clock signals at the output sides of the two stages; and at least two of charge and discharge path means for holding the output signal of the shift register means to a fail-safe side, the two of the charge and discharge path means being connected to the output sides of the two stages of the shift register means.
Claim 9
Dependent Claim
121 words
A digital circuit, comprising: ordering circuit means operated in synchronization with a first clock signal; shift register means connected to the ordering circuit means, the shift register means having at least two stages operated by second and third clock signals having respective periods to output an output signal, and having time constants larger than those of the periods of the second and third clock signals at the output sides of the two stages; and at least two of charge and discharge path means for holding the output signal of the shift register means to a fail-safe side, the two of the charge and discharge path means being connected to the output sides of the two stages of the shift register means.
Claim 10
Dependent Claim
59 words
The circuit of claim 7, also including: a processor which is operated in synchronization with the first clock signal and outputs a control signal to be fed to an actuator; and means for allowing the control signal of the processor to pass or stop to the actuator on the basis of the output signal of the shift register means.
Claim 11
Dependent Claim
26 words
The circuit of claim 7, also including a clock generator operated in synchronization with the first clock signal to generate the second and third clock signals.
Claim 12
Dependent Claim
20 words
The circuit of claim 7, wherein the shift register means includes two clocked inverters connected to each other in series.
Claim 13
Dependent Claim
20 words
The circuit of claim 7, wherein the shift register means includes two MOS devices connected to each other in series.
Claim 14
Dependent Claim
20 words
The circuit of claim 7, wherein the ordering circuit means includes two flip flops connected to each other in series.
Claim 15
Dependent Claim
16 words
The circuit of claim 7, wherein the two of charge and discharge path means includes resistors.
Claim 16
Dependent Claim
21 words
The circuit of claim 11, wherein the two of charge and discharge path means includes parastic diodes of the MOS devices.
Claim 17
Dependent Claim
28 words
The circuit of claim 1, wherein the converter means comprises a frequency-voltage converter for outputting a signal having a voltage corresponding to the frequency of the clock signal.
Claim 18
Dependent Claim
36 words
The circuit of claim 4, wherein one of the first and second comparator devices includes a comparator and an inverter connected thereto in series, and another of the first and second comparator devices includes another comparator.
Claim 19
Dependent Claim
123 words
A digital circuit, comprising: a processor which is operated in synchronization with a clock signal and outputs a control signal to be fed to an actuator; converter means for converting a period or frequency of the clock signal to an analog voltage value; comparator means for comparing whether or not the analog voltage value is within a reference value range to output a comparison signal; and holding means for allowing the control signal to pass or stop to the actuator on the basis of the comparison signal; wherein the converter means includes an AND circuit, a transistor device connected to the AND circuit, a capacitor connected to the transistor device and a current source device for supplying a constant current to the capacitor.
Claim 20
Dependent Claim
123 words
A digital circuit, comprising: a processor which is operated in synchronization with a clock signal and outputs a control signal to be fed to an actuator; converter means for converting a period or frequency of the clock signal to an analog voltage value; comparator means for comparing whether or not the analog voltage value is within a reference value range to output a comparison signal; and holding means for allowing the control signal to pass or stop to the actuator on the basis of the comparison signal; wherein the converter means includes an AND circuit, a transistor device connected to the AND circuit, a capacitor connected to the transistor device and a current source device for supplying a constant current to the capacitor.
Claim 21
Dependent Claim
13 words
The circuit of claim 17, wherein the current source includes a transistor device.
Claim 22
Dependent Claim
129 words
A digital circuit, comprising: a processor which is operated in synchronization with a clock signal and outputs a control signal to be fed to an actuator; converter means for converting a period or frequency of the clock signal to an analog voltage value; comparator means for comparing whether or not the analog voltage value is within a reference value range to output a comparison signal; and holding means for allowing the control signal to pass or stop to the actuator on the basis of the comparison signal; wherein the comparator means includes first and second comparator devices for comparing the analog voltage value with high and low reference values, respectively; and wherein each of the first and second comparator devices includes a comparator and a flip flop connected thereto.
Claim 23
Dependent Claim
129 words
A digital circuit, comprising: a processor which is operated in synchronization with a clock signal and outputs a control signal to be fed to an actuator; converter means for converting a period or frequency of the clock signal to an analog voltage value; comparator means for comparing whether or not the analog voltage value is within a reference value range to output a comparison signal; and holding means for allowing the control signal to pass or stop to the actuator on the basis of the comparison signal; wherein the comparator means includes first and second comparator devices for comparing the analog voltage value with high and low reference values, respectively; and wherein each of the first and second comparator devices includes a comparator and a flip flop connected thereto.
Claim 24
Dependent Claim
94 words
A digital circuit, comprising: a processor which is operated in synchronization with a clock signal and outputs a control signal to be fed to an actuator; converter means for converting a period or frequency of the clock signal to an analog voltage value; comparator means for comparing whether or not the analog voltage value is within a reference value range to output a comparison signal; and holding means for allowing the control signal to pass or stop to the actuator on the basis of the comparison signal; wherein the holding means includes AND circuits.
Claim 25
Dependent Claim
94 words
A digital circuit, comprising: a processor which is operated in synchronization with a clock signal and outputs a control signal to be fed to an actuator; converter means for converting a period or frequency of the clock signal to an analog voltage value; comparator means for comparing whether or not the analog voltage value is within a reference value range to output a comparison signal; and holding means for allowing the control signal to pass or stop to the actuator on the basis of the comparison signal; wherein the holding means includes AND circuits.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-11-11 | 1995-05-13 | 1995-11-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-11-11 | 1999-05-13 | 1999-11-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-11-11 | 2003-05-13 | 2003-11-12 | $7700.00 | Window Closed / Lapsed |