Cubic equation calculation apparatus and cubic curve coordinate data generation apparatus using the same

Claim 2

A cubic equation calculation apparatus for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, the apparatus comprising: a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n -1+C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 `A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1, and a second calculation circuit, operatively connected to an output of said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n, wherein said first calculation circuit includes: first data storage means for storing coefficient data A n , second data storage means for storing coefficient data B n , third data storage means for storing coefficient data C n , fourth data storage means for storing coefficient data D n , a first data transfer circuit, operatively connected to said first data storage means, for transferring coefficient data A n stored in said first data storage means when T=n, to said first data storage means as the coefficient data A n+1 when T=n+1, a first coefficient data calculation circuit, operatively connected to said first data storage means and said second data storage means, for inputting coefficient data A n stored in said first data storage means and coefficient data B n stored in said second data storage means and for performing the calculation of (3A n +B n ), a second data transfer circuit, operatively connected to said first data calculation circuit, for transferring data calculated by said first data calculation circuit when T=n, to said second data storage means as the coefficient data B n+1 when T=n+1, a second coefficient data calculation circuit, operatively connected to said first data storage means and said second data storage means and said third data storage means, for inputting coefficient data A n stored in said first data storage means and coefficient data B n stored in said second data storage means and coefficient data C n stored in said third data storage means and for performing the calculation of (3A n 2B n +C n ), a third data transfer circuit, operatively connected to said second data calculation circuit, for transferring data calculated by said second data calculation circuit when T=n, to said third data storage means as the coefficient data C n+1 when T=n+1, a third coefficient data calculation circuit, operatively connected to said first data storage means and said second data storage means and said third data storage means and said fourth data storage means, for inputting coefficient data A n stored in said first data storage means and coefficient data B n stored in said second data storage means and coefficient data C n stored in said third data storage means and coefficient data D n stored in said fourth data storage means and for performing the calculation of (A n +B n +C n +D n ), and a fourth data transfer circuit, operatively connected to said third data calculation circuit, for transferring data calculated by said third data calculation circuit when T=n, to said fourth data storage means as the coefficient data D n+1 when T=n+1, wherein said second calculation circuit uses coefficient data stored in said first data storage means, said second data storage means, said third data storage means and said fourth data storage means to calculate f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n.

Claim 3

The cubic equation calculation apparatus as claimed in claim 1, wherein: said first data storage means, said second data storage means, said third data storage means and said fourth data storage means have, respectively, a first register, a second register, a third register and a fourth register storing binary coefficient data A n , B n , C n and D n , said first coefficient data calculation circuit is operatively connected to said first and second registers and has a first adding circuit to add binary coefficient data A n stored in said first register, binary coefficient data 2A n which is binary coefficient data A n shifted one bit in the direction of a most significant bit position and binary coefficient data B n stored in said second register, said second coefficient data calculation circuit is operatively connected to said first, second, and third registers and has a second adding circuit to add binary coefficient data A n stored in said first register, binary coefficient data 2A n which is binary coefficient data A n shifted one bit in the direction of a most significant bit position and binary coefficient data 2B n which is said binary coefficient data B n shifted one bit in the direction of a most significant bit position and binary coefficient data C n stored in said third register, and said third coefficient data calculation circuit is operatively connected to said first, second, third and fourth registers and has a third adding circuit to add coefficient data A n , B n , C n and D n stored in said first register, said second register, said third register and said fourth register, respectively.

Claim 4

The cubic equation calculation apparatus as claimed in claim 2, wherein: said first adding circuit includes a first group and second group of full adders, each of said full adders corresponding to each bit of added binary data and having three 1-bit input terminals, an 1-bit calculation output terminal and a carryover terminal, said 1-bit input terminals of each full adder of said first group having input to them a bit of a first added binary data, a bit of second added binary data corresponding to said bit of first added binary data, and a carryover bit from said carryover terminal of a full adder corresponding to a bit which is one-digit lower than said bit of the first added binary data input, said 1-bit input terminals of each full adder of said second group having input to them a calculation output bit from said calculation output terminal of a first group full adder corresponding to the same bit as said added binary data, a bit of a third added binary data, and a carryover bit from said carryover terminal of a full adder corresponding to a bit which is one-digit lower than said bit of the third added binary data input, and binary coefficient data A n , 2A n , and B n input to said first adding circuit become said first, second and third added binary data, respectively.

Claim 5

The cubic equation calculation apparatus as claimed in claim 2, wherein: at least one of said second and third adding circuit includes a first group, a second group and a third group of full adders, each of said full adders corresponding to a bit of added binary data and having three 1-bit input terminals, an 1-bit calculation output terminal and a carryover terminal, said 1-bit input terminals of each full adder of said first group having input to them a bit of first added binary data, a bit of second added binary data corresponding to said bit of the first added binary data, and a carryover bit from said carryover terminal of a full adder corresponding to a bit which is one-digit lower than said bit of the first added binary data input, said 1-bit input terminals of each full adder of said second group having input to them a calculation output bit from said calculation output terminal of a first group full adder corresponding to the same bit as said added binary data, a bit of a third added binary data, and a carryover bit from said carryover terminal of a full adder corresponding to a bit which is one-digit lower than said bit of the third added binary data input, said 1-bit input terminals of each full adder of said third group having input to them a calculation output bit from said calculation output terminal of a second group full adder corresponding to the same bit as said added binary data, a bit of a fourth added binary data, and a carryover bit from said carryover terminal of a full adder corresponding to a bit which is one-digit lower than said bit of the fourth added binary data input, and at least one of binary coefficient a n , 2A n , 2B n , C n and binary coefficient A n , B n , C n , D n become said first, second, third and fourth added binary data.

Claim 6

The cubic calculation apparatus as claimed in claim 1, wherein said third coefficient data calculation circuit of said first calculation circuit is also used as said second calculation circuit.

Claim 7

A cubic equation calculation apparatus for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, the apparatus comprising: a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n 3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n -1+C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1; a second calculation circuit, coupled to an output of said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n; a data conversion circuit, coupled to said first calculation circuit, using results of calculation of said first calculation circuit for generating data A n /8, B n /4 and C n /2 and for respectively converting A n /8 into new coefficient data A n , B n /4 into new coefficient data B n , C n /2 into new coefficient data C n , and D n into new coefficient data D n ; and a data selection circuit, coupled to said first calculation circuit and said data conversion circuit, for selectively supplying one of results of calculation of said first calculation circuit and coefficient data a n , B n , C n and D n obtained from said data conversion circuit, to said second calculation circuit; wherein said second calculation circuit is coupled to said data selection circuit and uses coefficient data A n , B n , C n and D n supplied from said data selection circuit to calculate f(n) in accordance with f(n)=A.sub.n +B.sub.n C.sub.n +D.sub.n when T=n.

Claim 8

A cubic equation calculation apparatus for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, the apparatus comprising: a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n 3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n -1+C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1; a second calculation circuit, coupled to an output of said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n; a data conversion circuit, coupled to said first calculation circuit, using results of calculation of said first calculation circuit for generating data A n /8, B n /4 and C n /2 and for respectively converting A n /8 into new coefficient data A n , B n /4 into new coefficient data B n , C n /2 into new coefficient data C n , and D n into new coefficient data D n ; and a data selection circuit, coupled to said first calculation circuit and said data conversion circuit, for selectively supplying one of results of calculation of said first calculation circuit and coefficient data a n , B n , C n and D n obtained from said data conversion circuit, to said second calculation circuit; wherein said second calculation circuit is coupled to said data selection circuit and uses coefficient data A n , B n , C n and D n supplied from said data selection circuit to calculate f(n) in accordance with f(n)=A.sub.n +B.sub.n C.sub.n +D.sub.n when T=n.

Claim 9

The cubic equation calculation apparatus as claimed in claim 6, wherein: (a) said first calculation circuit includes: first data storage means for storing coefficient data A n , second data storage means for storing coefficient data B n , third data storage means for storing coefficient data C n , fourth data storage means for storing coefficient data D n , a first data transfer circuit, operatively connected to said first data storage means, for transferring coefficient data A n stored in said first data storage means when T=n, to said first data storage means as the coefficient data A n+1 when T=n+1, a first coefficient data calculation circuit, operatively connected to said first and second data storage means, for inputting coefficient data A n stored in said first data storage mean and coefficient data B n stored in said second data storage means and for performing the calculation of (3A n +B n ), a second data transfer circuit, operatively connected to said first data calculation circuit, for transferring data calculated by said first data calculation circuit when T=n, to said second data storage means as the coefficient data B n+1 when T=n+1, a second coefficient data calculation circuit, operatively connected to said first, second and third data storage means, for inputting coefficient data A n stored in said first data storage means and coefficient data B n stored in said second data storage means and coefficient data C n stored in said third data storage means and for performing the calculation of (3A n +2B n +C n ), a third data transfer circuit, operatively connected to said second data calculation circuit, for transferring data calculated by said second data calculation circuit when T=n, to said third data storage means as the coefficient data C n+1 when T=n+1, a third coefficient data calculation circuit, operatively connected to said first, second, third and fourth data storage means, for inputting coefficient data An stored in said first data storage means and coefficient data B n stored in said second data storage means and coefficient data C n stored in said third data storage means and coefficient data D n stored in said fourth data storage means and for performing the calculation of (A n +B n +C n +D n ), and a fourth data transfer circuit, operatively connected to said third data calculation circuit, for transferring data calculated by said third data calculation circuit when T=n, to said fourth data storage means as the coefficient data D n+1 when T=n+1; (b) said data conversion circuit includes: a first data re-transfer circuit, operatively connected to said first data storage means, for transferring data A n /8 to said first data storage means so that coefficient data A n stored in said first data storage means when T=n can be re-stored in said first data storage means as A n /8, a second data re-transfer circuit, operatively connected to said second data storage means, for transferring data B n /4 to said second data storage means so that coefficient data B n stored in said second data storage means when T=n can be re-stored in aid second data storage means as B n /4, a third data re-transfer circuit, operatively connected to said third data storage means, for transferring data C n /2 to said third data storage means so that coefficient data C n stored in said third data storage means when T=n can be re-stored in said third data storage means as C n /2, and a fourth data re-transfer circuit, operatively connected to said fourth data storage means, to transfer data D n to said fourth data storage means so that coefficient data D n stored in said fourth data storage means when T=n can be re-stored as it is in said fourth data storage means as D n ; (c) said data selection circuit includes: a data re-store selection circuit, operatively connected to said first, second, third and fourth data re-transfer circuits, for selecting whether or not said first data re-transfer circuit, said second data re-transfer circuit, said third data re-transfer circuit and said fourth data re-transfer circuit are to restore data to said first data storage means, said second data storage means, said third data storage means and said fourth data storage means; and (d) said second calculation circuit is operatively connected to said first, second, third and fourth data storage means and uses coefficient data stored in said first data storage means, said second data storage means, said third data storage means and said fourth data storage means, to calculate f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n.

Claim 10

A cubic equation calculation apparatus for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, the apparatus comprising: a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1; a second calculation circuit, coupled to an output of said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n; a data conversion circuit, coupled to said first calculation circuit, using results of calculation of said first calculation circuit for generating data 8A n , 4B n and 2C n and for respectively converting 8A n into new coefficient data A n , 4B n into new coefficient data B n , 2C n into new coefficient data C n , and D n into new coefficient data D n ; and a data selection circuit, coupled to said first calculation circuit and said data conversion circuit, for selectively supplying one of results of calculation of said first calculation circuit and coefficient data A n , B n , C n , and D n obtained from said data conversion circuit, to said second calculation circuit; wherein said second calculation circuit is coupled to said data selection circuit and uses coefficient data A n , B n , C n and D n supplied from said data selection circuit to calculate f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.

Claim 11

A cubic equation calculation apparatus for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, the apparatus comprising: a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1; a second calculation circuit, coupled to an output of said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n; a data conversion circuit, coupled to said first calculation circuit, using results of calculation of said first calculation circuit for generating data 8A n , 4B n and 2C n and for respectively converting 8A n into new coefficient data A n , 4B n into new coefficient data B n , 2C n into new coefficient data C n , and D n into new coefficient data D n ; and a data selection circuit, coupled to said first calculation circuit and said data conversion circuit, for selectively supplying one of results of calculation of said first calculation circuit and coefficient data A n , B n , C n , and D n obtained from said data conversion circuit, to said second calculation circuit; wherein said second calculation circuit is coupled to said data selection circuit and uses coefficient data A n , B n , C n and D n supplied from said data selection circuit to calculate f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.

Claim 12

The cubic equation calculation apparatus as claimed in claim 8, wherein: (a) said first calculation circuit includes: first data storage means for storing coefficient data A n , second data storage means for storing coefficient data B n , third data storage means for storing coefficient data C n , fourth data storage means for storing coefficient data D n , a first data transfer circuit, operatively connected to said first data storage means, for transferring coefficient data A n stored in said first data storage means when T=n, to said first data storage means as the coefficient data A n+1 when T=n+1, a first coefficient data calculation circuit, operatively connected to said first and second data storage means, for inputting coefficient data A n stored in said first data storage means and coefficient data B n stored in said second data storage means and for performing the calculation of (3A n +B n ), a second data transfer circuit, operatively connected to said first data calculation circuit, for transferring data calculated by said first data calculation circuit when T=n, to said second data storage means as the coefficient data B n+1 when T=n+1, a second coefficient data calculation circuit, operatively connected to said first, second and third data storage means, for inputting coefficient data A n stored in said first data storage means and coefficient data B n stored in said second data storage means and coefficient data C n stored in said third data storage means and for performing the calculation of (3A n +2B n +C n ), a third data transfer circuit, operatively connected to said second data calculation circuit, for transferring data calculated by said second data calculation circuit when T=n, to said third data storage means as the coefficient data C n+1 when T=n+1, a third coefficient data calculation circuit, operatively connected to said first, second, third and fourth data storage means, for inputting coefficient data A n stored in said first data storage means and coefficient data B n stored in said second data storage means and coefficient data C n stored in said third data storage means and coefficient data D n stored in said fourth data storage means and for performing the calculation of (A n +B n +C n +D n ), and a fourth data transfer circuit, operatively connected to said third data calculation circuit, for transferring data calculated by said third data calculation circuit when T=n, to said fourth data storage mans as the coefficient data D n+1 when T=n+1; (b) said data conversion circuit includes: a first data re-transfer circuit, operatively connected to said first data storage means, for transferring data 8A n to said first data storage means so that coefficient data A n stored in said first data storage means when T=n can be re-stored in said first data storage means as 8A n , a second data re-transfer circuit, operatively connected to said second data storage means, for transferring data 4B n to said second data storage means so that coefficient data B n stored in said second data storage means when T=n can be re-stored in said second data storage means as 4B n , a third data re-transfer circuit, operatively connected to third data storage means, for transferring data 2C n to said third data storage means so that coefficient data C n stored in said third data storage means when T=n can be re-stored in said third data storage means as 2C n , and a fourth data re-transfer circuit, operatively connected to said fourth data storage means, to transfer data D n to said fourth data storage means so that coefficient data D n stored in said fourth data storage means when T=n can be re-stored as it is in said fourth data storage means as D n ; (c) said data selection circuit includes: a data re-store selection circuit, operatively connected to said first, second, third and fourth data re-transfer circuits, for selecting whether or not said first data re-transfer circuit, said second data re-transfer circuit, said third data re-transfer circuit and said fourth data re-transfer circuit are to restore data to said first data storage means, said second data storage means, said third data storage means and said fourth data storage means; and (d) said second calculation circuit is operatively connected to said first, second, third and fourth data storage means and uses coefficient data stored in said first data storage means, said second data storage means, said third data storage means and said fourth data storage means, to calculate f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n.

Claim 13

A cubic equation calculation apparatus for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, the apparatus comprising: a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 and D n-1 when T=n-1; a second calculation circuit, coupled to an output of said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n; a first data conversion circuit, coupled to said first calculation circuit, using results of calculation of said first calculation circuit for generating data A n /8, B n /4 and C n /2 and for respectively converting A n /8 into new coefficient data A n , B n /4 into new coefficient data B n , C n /2 into new coefficient data C n , and D n into new coefficient data D n ; a second data conversion circuit, coupled to said first calculation circuit, using results of calculation of said first calculation circuit for generating data 8A n , 4B n and 2C n and for respectively converting 8A n into new coefficient data A n , 4B n into new coefficient data B n , 2C n into new coefficient data C n , D n into new coefficient data D n ; and a data selection circuit, coupled to said first calculation circuit and said first and second data conversion circuits, for selectively supplying one of results of calculation of said first calculation circuit and coefficient data A n , B n , C n and D n obtained from said first and second data conversion circuits, to said second calculation circuit; wherein said second calculation circuit is coupled to said data selection circuit and uses coefficient data A n , B n , C n and D n supplied from said data selection circuit to calculate f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.

Claim 14

A cubic equation calculation apparatus for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, the apparatus comprising: a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 and D n-1 when T=n-1; a second calculation circuit, coupled to an output of said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n; a first data conversion circuit, coupled to said first calculation circuit, using results of calculation of said first calculation circuit for generating data A n /8, B n /4 and C n /2 and for respectively converting A n /8 into new coefficient data A n , B n /4 into new coefficient data B n , C n /2 into new coefficient data C n , and D n into new coefficient data D n ; a second data conversion circuit, coupled to said first calculation circuit, using results of calculation of said first calculation circuit for generating data 8A n , 4B n and 2C n and for respectively converting 8A n into new coefficient data A n , 4B n into new coefficient data B n , 2C n into new coefficient data C n , D n into new coefficient data D n ; and a data selection circuit, coupled to said first calculation circuit and said first and second data conversion circuits, for selectively supplying one of results of calculation of said first calculation circuit and coefficient data A n , B n , C n and D n obtained from said first and second data conversion circuits, to said second calculation circuit; wherein said second calculation circuit is coupled to said data selection circuit and uses coefficient data A n , B n , C n and D n supplied from said data selection circuit to calculate f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.

Claim 15

The cubic equation calculation apparatus as claimed in claim 10, wherein: (a) said first calculation circuit includes; first data storage means for storing coefficient data A n , second data storage means for storing coefficient data B n , third data storage means for storing coefficient data C n , fourth data storage means for storing coefficient data D n , a first data transfer circuit, operatively connected to said first data storage means, for transferring coefficient data A n stored in said first data storage means when T=n, to said first data storage means as the coefficient data A n+1 when T=n+1, a first coefficient data calculation circuit, operatively connected to said first and second data storage means, for inputting coefficient data A n stored in said first data storage means and coefficient data B n stored in said second data storage means and for performing the calculation of (3A n +B n ), a second data transfer circuit, operatively connected to said first data calculation circuit, for transferring data calculated by said first data calculation circuit when T=n, to said second data storage means as the coefficient data B n+1 when T=n+1, a second coefficient data calculation circuit, operatively connected to said first, second and third data storage means, for inputting coefficient data A n stored in said first data storage means and coefficient data B n stored in said second data storage means and coefficient data C n stored in said third data storage means and for performing the calculation of (3A n +2B n +C n ), a third data transfer circuit, operatively connected to said second data calculation circuit, for transferring data calculated by said second data calculation circuit when T=n, to said third data storage means as the coefficient data C n+1 when T=n+1, a third coefficient data calculation circuit, operatively connected to said first, second, third and fourth data storage means, for inputting coefficient data A n stored in said first data storage means and coefficient data B n stored in said second data storage means and coefficient data C n stored in said third data storage means and coefficient data D n stored in said fourth data storage means and for performing the calculation of (A n +B n +C n +D n ), and a fourth data transfer circuit, operatively connected to said third data calculation circuit, for transferring data calculated by said third data calculation circuit when T=n, to said fourth data storage means as the coefficient data D n+1 when T=n+1; (b) said first data conversion circuit includes: a first data re-transfer circuit, operatively connected to said first data storage means, for transferring data A n /8 to said first data storage means so that coefficient data A n stored in said first data storage means when T=n can be re-stored in said first data storage means as A n /8, a second data re-transfer circuit, operatively connected to said second data storage means, for transferring data B n /4 to said second data storage means so that coefficient data B n stored in said second data storage means when T=n can be re-stored in said second data storage means as B n /4, a third data re-transfer circuit, operatively connected to said third data storage means, for transferring data C n /2 to said third data storage means so that coefficient data C n stored in said third data storage means when T=n can be re-stored in said third data storage means as C n /2, and a fourth data re-transfer circuit, operatively connected to said fourth data storage means, to transfer data D n to said fourth data storage means so that coefficient data D n stored in said fourth data storage means when T=n can be re-stored as it is in said fourth data storage means as D n ; (c) said second data conversion circuit includes: a fifth data re-transfer circuit, operatively connected to said first data storage means, for transferring data 8A n to said first data storage means so that coefficient data A n stored in said first data storage means when T=n can be re-stored in said first data storage means as 8A n , a sixth data re-transfer circuit, operatively connected to said second storage means, for transferring data 4B n to said second data storage means so that coefficient data B n stored in said second data storage means when T=n can be re-stored in said second data storage means as 4B n , and a seventh data re-transfer circuit, operatively connected to said third data storage means, for transferring data 2C n to said third data storage means so that coefficient data C n stored in said third storage means when T=n can be re-stored in said third data storage means as 2C n ; (d) said data selection circuit includes: a data re-store selection circuit, operatively connected to said first, second, third, fourth, fifth, sixth and seventh data re-transfer circuits, for selecting whether or not said first data re-transfer circuit, said second data re-transfer circuit, said third data re-transfer circuit and said fourth data re-transfer circuit are to restore data to said first data storage means, said second data storage means, said third data storage means and said fourth data storage means and selecting whether or not said fifth data re-transfer circuit, said sixth data re-transfer circuit, said seventh data re-transfer circuit and said fourth data re-transfer circuit are to restore data to said first data storage means, said second data storage means, said third storage means and said fourth storage means; and (e) said second calculation circuit, operatively connected to said first, second, third, and fourth data storage means, uses coefficient data stored in said first data storage means, said second data storage means, said third data storage means and said fourth data storage means, to calculate f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n.

Claim 16

A cubic curve coordinate data generation apparatus, comprising: a cubic equation calculation circuit for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, said cubic equation specifying a cubic curve; and a coordinate data calculation circuit, operatively connected to said cubic equation calculation circuit, for calculating coordinate data on said cubic curve on basis of f(n) calculated by said cubic equation calculation circuit; said cubic equation calculation circuit having: (a) a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1, and (b) a second calculation circuit, operatively connected to said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.

Claim 17

A cubic curve coordinate data generation apparatus, comprising: a cubic equation calculation circuit for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, said cubic equation specifying a cubic curve; and a coordinate data calculation circuit, operatively connected to said cubic equation calculation circuit, for calculating coordinate data on said cubic curve on basis of f(n) calculated by said cubic equation calculation circuit; said cubic equation calculation circuit having: (a) a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1, and (b) a second calculation circuit, operatively connected to said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.

Claim 18

A cubic curve coordinate data generation apparatus, comprising: a cubic equation calculation circuit for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, said cubic equation specifying a cubic curve; and a coordinate data calculation circuit, operatively connected to said cubic equation calculation circuit, for calculating coordinate data on said cubic curve on basis of f(n) calculated by said cubic equation calculation circuit; said cubic equation calculation circuit having: (a) a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1; (b) a second calculation circuit, operatively connected to said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n; a judgement circuit, operatively connected to said coordinate data calculation circuit, for outputting a control signal when a distance between neighboring points on the cubic curve which are specified by coordinate data calculated by said coordinate data calculation circuit becomes equal to or larger than a predetermined distance; wherein: (a) said cubic equation calculation circuit further comprising: a data conversion circuit, operatively connected to said first calculation circuit, using results of calculation of said first calculation circuit for generating data A n /8, B n /4 and C n /2 and for respectively converting A n /8 into new coefficient data A n , B n /4 into new coefficient data B n , C n /2 into new coefficient data C n , and D n into new coefficient data D n ; and a data selection circuit, operatively connected to said first calculation circuit, said judgement circuit, and said data conversion circuit, for selectively supplying the result A n , B n , C n and D n of calculation of said first calculation circuit when said control signal is not output from said judgement circuit and coefficient data A n , B n , C n and D n obtained from said data conversion circuit when said control signal is output from said judgement circuit, to said second calculation circuit; and (b) said second calculation circuit is operatively connected to said data selection circuit and uses coefficient data A n , B n , C n and D n supplied from said data selection circuit to calculate f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.

Claim 19

A cubic curve coordinate data generation apparatus, comprising: a cubic equation calculation circuit for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, said cubic equation specifying a cubic curve; and a coordinate data calculation circuit, operatively connected to said cubic equation calculation circuit, for calculating coordinate data on said cubic curve on basis of f(n) calculated by said cubic equation calculation circuit; said cubic equation calculation circuit having: (a) a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1; (b) a second calculation circuit, operatively connected to said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n; a judgement circuit, operatively connected to said coordinate data calculation circuit, for outputting a control signal when a distance between neighboring points on the cubic curve which are specified by coordinate data calculated by said coordinate data calculation circuit becomes equal to or larger than a predetermined distance; wherein: (a) said cubic equation calculation circuit further comprising: a data conversion circuit, operatively connected to said first calculation circuit, using results of calculation of said first calculation circuit for generating data A n /8, B n /4 and C n /2 and for respectively converting A n /8 into new coefficient data A n , B n /4 into new coefficient data B n , C n /2 into new coefficient data C n , and D n into new coefficient data D n ; and a data selection circuit, operatively connected to said first calculation circuit, said judgement circuit, and said data conversion circuit, for selectively supplying the result A n , B n , C n and D n of calculation of said first calculation circuit when said control signal is not output from said judgement circuit and coefficient data A n , B n , C n and D n obtained from said data conversion circuit when said control signal is output from said judgement circuit, to said second calculation circuit; and (b) said second calculation circuit is operatively connected to said data selection circuit and uses coefficient data A n , B n , C n and D n supplied from said data selection circuit to calculate f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.

Claim 20

A cubic curve coordinate data generation apparatus, comprising: a cubic equation calculation circuit for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, said cubic equation specifying a cubic curve; and a coordinate data calculation circuit, operatively connected to said cubic equation calculation circuit, for calculating coordinate data on said cubic curve on basis of f(n) calculated by said cubic equation calculation circuit; said cubic equation calculation circuit having: (a) a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 D.sub.n =A.sub.n-1 B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1; (b) a second calculation circuit, operatively connected to said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=a.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n; a judgement circuit, operatively connected to said coordinate data calculation circuit, for outputting a control signal when two points on the cubic curve which are specified by coordinate data calculated by said coordinate data calculation circuit are overlapped; wherein: (a) said cubic equation calculation circuit further comprises: a data conversion circuit, operatively connected to said first calculation circuit using results of calculation of said first calculation circuit for generating data 8A n , 4B n and 2C n and for respectively converting 8A n into new coefficient data A n , 4B n into new coefficient data B n , 2C n into new coefficient data C n , and D n into new coefficient data D n ; and a data selection circuit, operatively connected to said first calculation circuit, said judgement circuit, and said data conversion circuit, for selectively supplying the result A n , B n , C n and D n of calculation of said first calculation circuit when said control signal is not output from said judgement circuit and coefficient data A n , B n , C n and D n obtained form said data conversion circuit when said control signal is output from said judgement circuit, to said second calculation circuit; and (b) said second calculation circuit is operatively connected to said data selection circuit and uses coefficient data A n , B n , C n and D n supplied from said data selection circuit to calculate f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.

Claim 21

A cubic curve coordinate data generation apparatus, comprising: a cubic equation calculation circuit for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, said cubic equation specifying a cubic curve; and a coordinate data calculation circuit, operatively connected to said cubic equation calculation circuit, for calculating coordinate data on said cubic curve on basis of f(n) calculated by said cubic equation calculation circuit; said cubic equation calculation circuit having: (a) a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 D.sub.n =A.sub.n-1 B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1; (b) a second calculation circuit, operatively connected to said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=a.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n; a judgement circuit, operatively connected to said coordinate data calculation circuit, for outputting a control signal when two points on the cubic curve which are specified by coordinate data calculated by said coordinate data calculation circuit are overlapped; wherein: (a) said cubic equation calculation circuit further comprises: a data conversion circuit, operatively connected to said first calculation circuit using results of calculation of said first calculation circuit for generating data 8A n , 4B n and 2C n and for respectively converting 8A n into new coefficient data A n , 4B n into new coefficient data B n , 2C n into new coefficient data C n , and D n into new coefficient data D n ; and a data selection circuit, operatively connected to said first calculation circuit, said judgement circuit, and said data conversion circuit, for selectively supplying the result A n , B n , C n and D n of calculation of said first calculation circuit when said control signal is not output from said judgement circuit and coefficient data A n , B n , C n and D n obtained form said data conversion circuit when said control signal is output from said judgement circuit, to said second calculation circuit; and (b) said second calculation circuit is operatively connected to said data selection circuit and uses coefficient data A n , B n , C n and D n supplied from said data selection circuit to calculate f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.

Claim 22

A cubic curve coordinate data generation apparatus, comprising: a cubic equation calculation circuit for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, said cubic equation specifying a cubic curve; and a coordinate data calculation circuit, operatively connected to said cubic equation calculation circuit, for calculating coordinate data on said cubic curve on basis of f(n) calculated by said cubic equation calculation circuit; said cubic equation calculation circuit having: (a) a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1; (b) a second calculation circuit, operatively connected to said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n; a judgement circuit, operatively connected to said coordinate data calculation circuit, for outputting a first control signal when a distance between neighboring points on the cubic curve which are specified by coordinate data calculated by said coordinate data calculation circuit becomes equal to or larger than a predetermined distance, and for outputting a second control signal when two points on the cubic curve which are specified by coordinate data calculated by said coordinate data calculation circuit are overlapped; wherein: (a) said cubic equation calculation circuit further comprises: a first data conversion circuit, operatively connected to said first calculation circuit, using results of calculation of said first calculation circuit for generating data A n /8, B n /4 and C n /2 and for respectively converting A n /8 into new coefficient data A n , B n /4 into new coefficient data B n , C n /2 into new coefficient data C n , and D n into new coefficient data D n ; a second data conversion circuit, operatively connected to said first calculation circuit, using results of calculation of said first calculation circuit for generating data 8A n , 4B n and 2C n and for respectively converting 8A n into new coefficient data A n , 4B n into new coefficient data B n , 2C n into new coefficient data C n , and D n into new coefficient data D n ; and a data selection circuit, operatively connected to said first calculation circuit, said judgement circuit, and said first data conversion circuit, and said second conversion circuit, for selectively supplying the result A n , B n , C n and D n of calculation of said first calculation circuit when said first and second control signals are not output from said judgement circuit and coefficient data A n , B n , C n and D n obtained from said first data conversion circuit when said first control signal is output from said judgement circuit and coefficient data A n , B n , C n and D n obtained from said second data conversion circuit when said second signal is output from said judgement circuit, to said second calculation circuit; and (b) said second calculation circuit is operatively connected to said data selection circuit and uses coefficient data A n , B n , C n and D n supplied from said data selection circuit to calculate f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.

Claim 23

A cubic curve coordinate data generation apparatus, comprising: a cubic equation calculation circuit for calculating f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants, said cubic equation specifying a cubic curve; and a coordinate data calculation circuit, operatively connected to said cubic equation calculation circuit, for calculating coordinate data on said cubic curve on basis of f(n) calculated by said cubic equation calculation circuit; said cubic equation calculation circuit having: (a) a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A n , B n , C n and D n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 B.sub.n =3A.sub.n-1 +B.sub.n-1 C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 D.sub.n =A.sub.n-1 +B.sub.n-1 +C.sub.n-1 +D.sub.n-1 and using coefficient data A 1 , B 1 , C 1 and D 1 when T=1 being such that A 1 =A, B 1 =B, C 1 =C and D 1 =D, and using coefficient data A n-1 , B n-1 , C n-1 and D n-1 when T=n-1; (b) a second calculation circuit, operatively connected to said first calculation circuit, for using the results of calculation of said first calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n; a judgement circuit, operatively connected to said coordinate data calculation circuit, for outputting a first control signal when a distance between neighboring points on the cubic curve which are specified by coordinate data calculated by said coordinate data calculation circuit becomes equal to or larger than a predetermined distance, and for outputting a second control signal when two points on the cubic curve which are specified by coordinate data calculated by said coordinate data calculation circuit are overlapped; wherein: (a) said cubic equation calculation circuit further comprises: a first data conversion circuit, operatively connected to said first calculation circuit, using results of calculation of said first calculation circuit for generating data A n /8, B n /4 and C n /2 and for respectively converting A n /8 into new coefficient data A n , B n /4 into new coefficient data B n , C n /2 into new coefficient data C n , and D n into new coefficient data D n ; a second data conversion circuit, operatively connected to said first calculation circuit, using results of calculation of said first calculation circuit for generating data 8A n , 4B n and 2C n and for respectively converting 8A n into new coefficient data A n , 4B n into new coefficient data B n , 2C n into new coefficient data C n , and D n into new coefficient data D n ; and a data selection circuit, operatively connected to said first calculation circuit, said judgement circuit, and said first data conversion circuit, and said second conversion circuit, for selectively supplying the result A n , B n , C n and D n of calculation of said first calculation circuit when said first and second control signals are not output from said judgement circuit and coefficient data A n , B n , C n and D n obtained from said first data conversion circuit when said first control signal is output from said judgement circuit and coefficient data A n , B n , C n and D n obtained from said second data conversion circuit when said second signal is output from said judgement circuit, to said second calculation circuit; and (b) said second calculation circuit is operatively connected to said data selection circuit and uses coefficient data A n , B n , C n and D n supplied from said data selection circuit to calculate f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.