Semiconductor device and method of producing same

Claim 1

A semiconductor device comprising: a semiconductor substrate having an upper, major surface and a pillar-like portion, the pillar-like portion extending upwardly from said upper, major surface to a first height, said pillar-like portion having circumferential side wall surfaces of said first height, generally transverse to and forming corresponding junctures with said upper major surface, and a flat, top surface at said first height and generally parallel to said upper, major surface; a first insulating layer of uniform thickness comprising integral, upper major, sidewall and juncture portions of uniform thickness and respectively formed on and covering said upper major surfaces of said substrate, said circumferential side wall surfaces of said pillar-like portion, and said corresponding junctures therebetween; a first conductor formed on the first insulating layer in surrounding relationship relative to the pillar-like portion, the first conductor including integral and continuous base and upper portions extending, in succession, from the juncture portions and upwardly along said sidewall portions of said first insulating layer to a second height, less than the first height and defining an upper edge of said first conductor at the second height and remaining, exposed sidewall portions of the first insulating layer extending upwardly from said upper edge of said first conductor to said flat top surface of said pillar-like portion, and said base portion of said first conductor extending outwardly from each of said juncture portions of said first insulating layer and along said upper, major surface portion of said first insulating layer by a third distance and defining a bottom, outer edge of said first conductor and remaining, exposed upper major portions of said first insulating layer, said first conductor correspondingly having integral, upper and lower exposed surface portions respectively corresponding to said upper and base portions and extending from said upper edge and to said bottom, outer edge of said first conductor; a second insulating layer of integral, upper and lower portions respectively formed on and covering the upper and lower exposed surface portions of said first conductor, said second insulating layer lower portion having a second, lower edge, at said bottom, outer edge of said first conductor, connected to said upper major portion of said first insulating layer and said second insulating layer upper portion having a second, upper edge, at said upper edge of said first conductor, connected to said remaining, exposed sidewall portions of said first insulating layer, said second insulating layer upper portion being of greater thickness than the thickness of said second insulating layer lower portion, and said second insulating layer having an exposed, outer surface; a third insulating layer formed on said exposed, outer surface of said second insulating layer, said remaining, exposed sidewall and upper major portions of said first insulating layer said third insulating layer having an exposed, upper surface substantially coplanar with said flat, top surface of said pillar-like portion; and a second, elongated conductor including a first portion aligned with and formed on said top, flat surface of said pillar-like portion and electrically connected thereto, and a second portion formed on and extending along said upper, exposed surface of said third insulating layer.