Photoelectric array detection circuitry with dual gating means

Claim 2

Detection circuitry comprising a transmitter array having n light emitting elements where n is a whole number equal to or in excess of unity; a receiver array having m light receiving elements where m is a whole number equal to or in excess of unity, and where at least one of m and n is greater than unity; a power source for energizing the transmitter and receiver arrays; first gating means for gating the power from the power source to the transmitter array; second gating means for gating outputs of the receiver array; synchronization means operating at a predetermined frequency for operating said first and second gating means simultaneously; and summing means for summing outputs of said second gating means to provide an output signal which is the product of n and m greater than the output signal generated if both n and m were unity.

Claim 3

Detection circuitry according to claim 1 including means for selectively varying at least m or n.

Claim 4

Detection circuitry according to claim 1 wherein each said emitting element comprises a light emitting diode and wherein each said detecting element comprises a photodiode.

Claim 5

Detection circuitry comprising light transmitting means; a plurality of discreet light receiving means, each said light receiving means comprising a photodetector, and resistance means connected in series with the photodetector to define a junction therewith; gating means, for gating the outputs at the junctions between each photodetector and its corresponding resistance means; synchronization means operating at a predetermined frequency connected to simultaneously actuate the light receiving means and all the gating means; and summing means for summing the outputs of the gating means.

Claim 6

Detection circuitry comprising light transmitting means; a plurality of discreet light receiving means, each said light receiving means comprising a photodetector, and resistance means connected in series with the photodetector to define a junction therewith; gating means, for gating the outputs at the junctions between each photodetector and its corresponding resistance means; synchronization means operating at a predetermined frequency connected to simultaneously actuate the light receiving means and all the gating means; and summing means for summing the outputs of the gating means.

Claim 7

Detection circuitry according to claim 4 including filter means connected between each gating means and the summing means for filtering out the DC component and the low frequency AC component in the output at each said junction before application to said summing means.

Claim 8

Detection circuitry according to claim 4 including amplifying means connected between each said junction and said summing means.

Claim 9

Detection means according to claim 4 wherein said light transmitting means comprises a plurality of light emitting elements circuit means connecting said light emitting elements in series and a current source connected to said circuit means to energize said light emitting elements.

Claim 10

Detection circuitry according to claim 7 wherein said synchronization means comprises an oscillator connected to gate said current source and to said gating means.

Claim 11

Detection circuitry according to claim 7 including switching means for switching said light emitting elements selectively into and out of said circuit series.

Claim 12

Detection circuitry according to claim 4 wherein said light transmitting means comprises light emitting diodes and wherein said light receiving means includes photodiodes.

Claim 13

Detection circuitry according to claim 4 wherein the light transmitted and received lies in the infrared range.

Claim 14

Detection circuitry for controlling operation of an external device, the circuitry comprising: transmitter means for emitting light at an area; receiver means for receiving light from the same area and providing an output based on received light; and means for synchronously energizing the transmitter means with generation of outputs by the receiver means, wherein the transmitter means comprises at least a first number of light emitting elements, and the receiver means comprises a second number of light receiving elements, the first and second numbers totaling at least three, and wherein the detection circuitry further comprises means for summing outputs of the transmitter means to provide an output for controlling operation of the external device, and the output of the means for summing is greater, by a factor corresponding to a product of the first and second numbers, than an output which would be generated if both the first number and the second number were one.

Claim 15

Detection circuitry for controlling operation of an external device, the circuitry comprising: transmitter means for emitting light at an area; receiver means for receiving light from the same area and providing an output based on received light; and means for synchronously energizing the transmitter means with generation of outputs by the receiver means, wherein the transmitter means comprises at least a first number of light emitting elements, and the receiver means comprises a second number of light receiving elements, the first and second numbers totaling at least three, and wherein the detection circuitry further comprises means for summing outputs of the transmitter means to provide an output for controlling operation of the external device, and the output of the means for summing is greater, by a factor corresponding to a product of the first and second numbers, than an output which would be generated if both the first number and the second number were one.