US5045808A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Single-stage high-gain amplifier
Assignee: Qorvo US Inc
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Filing: 1990-02-26
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Granted: 1991-09-03
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Expires: 2010-02-26
Abstract
Abstract A high-gain solid-state amplifier (20) includes an amplification stage including a transistor (Q 1 ) having a current-dependent transconductance value. The transistor is operatively connected to a load resistor (R L1 ) through which a load current (I 1 ) flows. The value of the load resistor together with the transconductance value affects the voltage gain of the amplifier. A resistor (R 2 ) provides a supplemental bias current (I 2 ) to a current summing node (A). The current summing node sums the load current and the supplemental bias current and provides the transistor with a total current (I d ) that affects the transconductance value. The value of the supplemental bias current is chosen to supplement the load current to provide a predetermined total current so that the voltage gain may be adjusted by adjusting the load resistor without changing the transconductance value. Alternatively, the amplifier voltage gain may be enhanced by increasing the supplemental bias current and transistor size in a known manner while maintaining a fixed value of the load resistor.
Inventors
- 👤 Stewart S. Taylor
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 00:57
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343; H03F3/345; H03F3/3455; H03F1/00; H03F1/08; H03F1/22; H03F1/226; H03F2200/00; H03F2200/372
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
138 words
A high-gain, low-noise solid-state amplifier, comprising: an amplification stage including a transistor through which a transistor current flows and having a transistor current-dependent transconductance, the transistor operatively coupled to a load impedance to provide a voltage gain that approximately equals the transconductance of the transistor times the load impedance; supplemental bias current means for providing a supplemental bias current that forms a component of the transistor current, the supplemental bias current affecting the transconductance of the transistor and enabling a change in the voltage gain with substantial mutual independence of the transconductance of the transistor and the load impedance; and negative feedback means electrically connected to the transistor for providing the amplification stage with an output impedance of relatively high value and thereby permitting the load impedance to be of relatively high value to increase the voltage gain.
Claim 2
Dependent Claim
138 words
A high-gain, low-noise solid-state amplifier, comprising: an amplification stage including a transistor through which a transistor current flows and having a transistor current-dependent transconductance, the transistor operatively coupled to a load impedance to provide a voltage gain that approximately equals the transconductance of the transistor times the load impedance; supplemental bias current means for providing a supplemental bias current that forms a component of the transistor current, the supplemental bias current affecting the transconductance of the transistor and enabling a change in the voltage gain with substantial mutual independence of the transconductance of the transistor and the load impedance; and negative feedback means electrically connected to the transistor for providing the amplification stage with an output impedance of relatively high value and thereby permitting the load impedance to be of relatively high value to increase the voltage gain.
Claim 3
Dependent Claim
16 words
The amplifier of claim 1, wherein the supplemental bias current means comprises a passive resistive element.
Claim 4
Dependent Claim
34 words
The amplifier of claim 1, wherein the amplifier has an input and an output and further comprises a feedback resistive element electrically connected between them, thereby to form an amplifier of the transimpedance type.
Claim 5
Dependent Claim
29 words
The amplifier of claim 1, wherein the transistor constitutes a first transistor and the amplification stage further includes a second transistor configured in cascode arrangement with the first transistor.
Claim 6
Dependent Claim
32 words
The amplifier of claim 4, wherein the first and second transistors are of the field effect type, the second transistor having a drain terminal that is electrically connected to the load impedance.
Claim 7
Dependent Claim
54 words
The amplifier of claim 5, wherein a load current flows through the load impedance, and further comprising current summing means for summing the load current and the supplemental bias current to produce the transistor current, the current summing means having an impedance value and the second transistor having an impedance at its drain terminal.
Claim 8
Dependent Claim
26 words
The amplifier of claim 6, wherein the negative feedback means includes a third transistor electrically connected to the current summing means and to the second transistor.
Claim 9
Dependent Claim
70 words
The amplifier of claim 1, wherein a load current flows through the load impedance, and further comprising: current summing means for summing the load current and the supplemental bias current to produce the transistor current, and wherein the transistor constitutes a first transistor and wherein the amplifier stage further includes the first transistor; and a second transistor having an output terminal and connected in cascode arrangement with the first transistor.
Claim 10
Dependent Claim
60 words
The amplifier of claim 8, wherein the negative feedback means comprises a third transistor electrically connected to the current summing means and to the second transistor, the third transistor providing negative feedback for raising the impedance at the output terminal of the second transistor to facilitate adjustment of the load impedance without changing the transconductance value of the first transistor.
Claim 11
Dependent Claim
29 words
The amplifier of claim 8, in which the second transistor is of the field effect type, and the output impedance of the second transistor appears at its drain terminal.
Claim 12
Dependent Claim
24 words
The amplifier of claim 1, wherein the amplification stage, the load impedance, and the supplemental bias current means are implemented in integrated circuit form.
Claim 13
Dependent Claim
14 words
The amplifier of claim 1, wherein the transistor is of the gallium arsenide type.
Claim 14
Dependent Claim
12 words
The amplifier of claim 1, wherein the load impedance comprises a resistor.
Claim 15
Dependent Claim
178 words
A high-gain, low-noise solid-state amplifier, comprising: an amplification stage including a transistor having a current dependent transconductance value, the transistor operatively coupled to a load impedance through which a load current flows, the value of the load impedance together with the transconductance value affecting the voltage gain of the amplifier; supplemental bias current means for providing a supplemental bias current whose value is chosen in conjunction with the amount of load current; current summing means for summing the load current and the supplemental bias current and for providing to the transistor a total current that affects the transconductance value, the value of supplemental bias current being chosen to supplement the load current to provide a predetermined total current so that the voltage gain may be chosen by adjusting the load impedance without changing the transconductance value of the transistor; and negative feedback means electrically connected to the transistor for providing the amplification state with an output impedance of relatively high value and thereby permitting the load impedance to be of relatively high value to increase the voltage gain.
Claim 16
Dependent Claim
178 words
A high-gain, low-noise solid-state amplifier, comprising: an amplification stage including a transistor having a current dependent transconductance value, the transistor operatively coupled to a load impedance through which a load current flows, the value of the load impedance together with the transconductance value affecting the voltage gain of the amplifier; supplemental bias current means for providing a supplemental bias current whose value is chosen in conjunction with the amount of load current; current summing means for summing the load current and the supplemental bias current and for providing to the transistor a total current that affects the transconductance value, the value of supplemental bias current being chosen to supplement the load current to provide a predetermined total current so that the voltage gain may be chosen by adjusting the load impedance without changing the transconductance value of the transistor; and negative feedback means electrically connected to the transistor for providing the amplification state with an output impedance of relatively high value and thereby permitting the load impedance to be of relatively high value to increase the voltage gain.
Claim 17
Independent Claim
181 words
A method of providing a high-gain, low-noise solid-state amplifier, comprising: providing an amplification stage including a transistor through which a transistor current flows and having a current-dependent transconductance, the transistor operatively coupled to a load impedance to provide a voltage gain that approximately equals the transconductance of the transistor times the load impedance; providing a load current of fixed value flowing through the load impedance; providing a supplemental bias current that forms a component of the transistor current; summing the load current and the supplemental bias current to determine the transistor current and thereby affect the transconductance of the transistor; adjusting the size of the transistor to adjust its transconductance and choosing a corresponding value of supplemental bias current to provide a change in the voltage gain of the amplification stage while maintaining the load current at a constant value; and providing negative feedback to the transistor to establish an output impedance of relatively high value in the amplification stage and thereby permit the load impedance to be of relatively high value to increase the voltage gain of the amplification stage.
Claim 18
Independent Claim
181 words
A method of providing a high-gain, low-noise solid-state amplifier, comprising: providing an amplification stage including a transistor through which a transistor current flows and having a current-dependent transconductance, the transistor operatively coupled to a load impedance to provide a voltage gain that approximately equals the transconductance of the transistor times the load impedance; providing a load current of fixed value flowing through the load impedance; providing a supplemental bias current that forms a component of the transistor current; summing the load current and the supplemental bias current to determine the transistor current and thereby affect the transconductance of the transistor; adjusting the size of the transistor to adjust its transconductance and choosing a corresponding value of supplemental bias current to provide a change in the voltage gain of the amplification stage while maintaining the load current at a constant value; and providing negative feedback to the transistor to establish an output impedance of relatively high value in the amplification stage and thereby permit the load impedance to be of relatively high value to increase the voltage gain of the amplification stage.
Claim 19
Dependent Claim
34 words
The method of claim 15, wherein the transistor is of the field effect type and the adjustment of the transconductance value of the transistor is accomplished by changing the ratio of its gate dimensions.
Claim 20
Dependent Claim
34 words
The method of claim 15 in which the step of providing an amplification stage including a transistor includes providing a first transistor and a second transistor configured in cascode arrangement with the first transistor.
Claim 21
Dependent Claim
37 words
The method of claim 17 in which the step of providing a supplemental bias current includes providing a passive resistive element electrically connected to the output of the first transistor and to a source of constant voltage.
Claim 22
Dependent Claim
33 words
The method of claim 15 in which the step of providing an amplification stage including a transistor includes operatively connecting the transistor to the load impedance wherein the load impedance comprises a resistor.
References Cited (Backward Citations)
JPS59126306A
Cited
US4881044A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-09-02 | 1995-03-04 | 1995-09-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-09-02 | 1999-03-04 | 1999-09-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-09-02 | 2003-03-04 | 2003-09-03 | $7700.00 | Window Closed / Lapsed |