US5045786A
Expired / Lapsed
US
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Circuit for measuring a variable inductance connected in series with a fixed inductance
Assignee: Robert Bosch GmbH
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Filing: 1988-05-05
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Granted: 1991-09-03
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Expires: 2008-05-05
Abstract
Abstract An oscillator (10) supplies via a first feeding path a fixed frequency signal to the fixed inductance (L o ) connected in series with a variable inductance (L). The signal at the common connection point of the two inductors (RW1) is used to provide an output signal (U act ) and a control voltage (V) for controlling the amplification of an inverting amplifier (B3) in a second feeding path from the variable oscillator (10) to the inductance (L). The signal from the common terminal (RW1) is processed in a differential amplifier (30) and an amplification control circuit (40) comprising a rectifier (B4, S), a delay element (VZ1), an integrator (I) and a sample-and-hold circuit (S & H) controlled by a synchronization output of the oscillator stage (20). The controllable amplifier (B3) is the part of a multiplier (50), which may comprise analogue or digital components.
Inventors
- 👤 Werner Fischer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 20:10
CPC Classifications
G; G01; G01R; G01R27/00; G01R27/02; G01R27/26; G01R27/2611
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
252 words
A circuit for evaluating a variable inductance (L) connected in series with a fixed inductance (L0), comprising: a signal generator (10) for generating a first signal (A1) having a fixed frequency and a fixed amplitude; a first path for feeding said first signal to a free end (RW0) of said fixed inductance; a controllable inverting amplifier (B3) connected with said signal generator to invert said first signal into a second signal having said fixed frequency at opposite phase and being controllable as to its amplitude; a second feeding path for applying said second signal to a free end (RW2) of said variable inductance; means for processing a third signal resulting at a common connection point of said fixed and variable inductances, said processing means including a matching circuit having an input connected to said common connection point to adjust said third signal (A3) toward a level of a d.c. reference voltage, an amplification control circuit including controllable rectifying means connected to an output of said matching circuit, integrating means connected with said rectifying means to integrate into a control value a deviation from the d.c. reference voltage of a rectified signal (A6) at the output of said rectifying means, means for quantizing said control value into a control signal (A7) applied to a control input of said controllable inverting amplifier (B3); and means for converting said control signal into an output signal (U act ) representative of a value of said variable inductance when said third signal (A3) is balanced to zero.
Claim 2
Dependent Claim
252 words
A circuit for evaluating a variable inductance (L) connected in series with a fixed inductance (L0), comprising: a signal generator (10) for generating a first signal (A1) having a fixed frequency and a fixed amplitude; a first path for feeding said first signal to a free end (RW0) of said fixed inductance; a controllable inverting amplifier (B3) connected with said signal generator to invert said first signal into a second signal having said fixed frequency at opposite phase and being controllable as to its amplitude; a second feeding path for applying said second signal to a free end (RW2) of said variable inductance; means for processing a third signal resulting at a common connection point of said fixed and variable inductances, said processing means including a matching circuit having an input connected to said common connection point to adjust said third signal (A3) toward a level of a d.c. reference voltage, an amplification control circuit including controllable rectifying means connected to an output of said matching circuit, integrating means connected with said rectifying means to integrate into a control value a deviation from the d.c. reference voltage of a rectified signal (A6) at the output of said rectifying means, means for quantizing said control value into a control signal (A7) applied to a control input of said controllable inverting amplifier (B3); and means for converting said control signal into an output signal (U act ) representative of a value of said variable inductance when said third signal (A3) is balanced to zero.
Claim 3
Dependent Claim
30 words
A circuit according to claim 1, comprising a synchronizing stage connected between said signal generator and said reference voltage source to generate a synchronizing signal derived from said first signal.
Claim 4
Dependent Claim
40 words
A circuit according to claim 2, wherein said rectifying means comprises a switch which is switchable by said synchronizing signal to pass the third signal (A3') at the output of said matching circuit either directly or via inverting means (B4).
Claim 5
Dependent Claim
58 words
A circuit according to claim 3, wherein the amplification control circuit (40) further comprises a delay element (VZ1) between the rectifying means and the integrating means, and wherein the output of the integrating means is supplied to a sample-and-hold circuit (S & H), the operation of which is controlled by said synchronising signal derived from the first signal.
Claim 6
Dependent Claim
36 words
A circuit according to claim 1, wherein the matching circuit is a differential amplifier circuit (30) and a voltage divider (X) is connected between the signal generator (10) and an input of the differential amplifier circuit.
Claim 7
Dependent Claim
21 words
A circuit according to claim 1 wherein the two inductances (L, L o ) are part of an inductive displacement transducer.
Claim 8
Dependent Claim
28 words
A circuit according to claim 1, wherein said control signal adjusts the amplitude of said second signal to a value at which said third signal approaches zero value.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-09-02 | 1995-03-04 | 1995-09-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-09-02 | 1999-03-04 | 1999-09-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-09-02 | 2003-03-04 | 2003-09-03 | $7700.00 | Window Closed / Lapsed |