Circuit transformation system, circuit transformation method, inverted logic generation method, and logic design system

Claim 7

A method according to claim 3, wherein said step of applying said candidate rule further comprises the step of: generating a subcircuit, in the circuit data, which is logically equivalent to a circuit described in the conclusion part of said candidate rule, by using a logic equivalence rule which is stored in said logic equivalence knowledge base memory.

Claim 10

A logic design system comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; input means for entering a functional description; translation means for translating said functional description into a circuit data which represents a netlist of function macros; a working memory for storing said circuit data; circuit transformation means for transforming said circuit data constituted by a set of function macros into a logically equivalent circuit data constituted by a set of logic cells, comprising: (a) means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) means for expanding the condition part of said candidate rule by using at least one of the transformation rules stored in said knowledge base memory; (c) means for matching the expanded condition part of said candidate rule to the circuit data in said working memory; (d) means for judging an application condition of said candidate rule; (e) means for expanding the conclusion part of said candidate rule by using at least on of the transformation rules stored in said knowledge base memory; and (f) means for applying said candidate rule in which the condition part and conclusion part have been expanded to the circuit data in said working memory for transforming the circuit after confirming an establishment of said application condition of said candidate rule; and output means for delivering circuit data from said working memory.

Claim 11

A logic design system comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; input means for entering a functional description; translation means for translating said functional description into a circuit data which represents a netlist of function macros; a working memory for storing said circuit data; circuit transformation means for transforming said circuit data constituted by a set of function macros into a logically equivalent circuit data constituted by a set of logic cells, comprising: (a) means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) means for expanding the condition part of said candidate rule by using at least one of the transformation rules stored in said knowledge base memory; (c) means for matching the expanded condition part of said candidate rule to the circuit data in said working memory; (d) means for judging an application condition of said candidate rule; (e) means for expanding the conclusion part of said candidate rule by using at least on of the transformation rules stored in said knowledge base memory; and (f) means for applying said candidate rule in which the condition part and conclusion part have been expanded to the circuit data in said working memory for transforming the circuit after confirming an establishment of said application condition of said candidate rule; and output means for delivering circuit data from said working memory.

Claim 12

A logic design system according to claim 6, wherein said means for applying said candidate rule comprises: means for removing elements extracted from elements described in the condition part of said candidate working memory; means for additionally registering the elements extracted from elements described in the conclusion part of said candidate rule into the data in said working memory; means for processing and applying subordinate transformation rules stored in said knowledge base memory.

Claim 13

A logic design system comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a logic negation knowledge base memory for storing logic negation rules which relate a logic circuit to another logic circuit with at least one of plural negated output./input signals; input means for entering a functional description; translation means for translating said functional description into a circuit data which represents a netlist of function macros; a working memory for storing said circuit data; circuit transformation means for transforming said circuit data constituted by a set of function macros into a logically equivalent circuit data constituted by a set of logic cells, comprising: (a) means for selecting a candidate rule, the candidate rule being transformation rules stored in said knowledge base memory; (b) means for matching the condition part of said candidate rule to a circuit data in said working memory and checking an application condition of said candidate rule; and (c) means for applying said candidate rule to the circuit data in said working memory for transforming the circuit after confirming an establishment of the application condition of the candidate rule; and output means for delivering circuit data from said working memory; wherein said means for applying said candidate rule comprises: (a) means for judging each signal of the output/input signals of an element expresses the logic negation of a specific signal and for extracting said signal when the element is being additionally registered into the circuit data in said working memory; (b) means for judging whether a logic negation rule, stored in said logic negation knowledge base memory, is applicable; (c) means for updating the circuit data and extracting said signal from the circuit data according to said logic negation rule, if said logic negation rule is judged to be application, said signal being equivalent to the logic negation of said specific signal; and (d) means for generating said signal by adding an inverter, which accepts said specific signal, to the circuit data, if said logic negation rule is judged to be inapplicable.

Claim 14

A logic design system comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a logic negation knowledge base memory for storing logic negation rules which relate a logic circuit to another logic circuit with at least one of plural negated output./input signals; input means for entering a functional description; translation means for translating said functional description into a circuit data which represents a netlist of function macros; a working memory for storing said circuit data; circuit transformation means for transforming said circuit data constituted by a set of function macros into a logically equivalent circuit data constituted by a set of logic cells, comprising: (a) means for selecting a candidate rule, the candidate rule being transformation rules stored in said knowledge base memory; (b) means for matching the condition part of said candidate rule to a circuit data in said working memory and checking an application condition of said candidate rule; and (c) means for applying said candidate rule to the circuit data in said working memory for transforming the circuit after confirming an establishment of the application condition of the candidate rule; and output means for delivering circuit data from said working memory; wherein said means for applying said candidate rule comprises: (a) means for judging each signal of the output/input signals of an element expresses the logic negation of a specific signal and for extracting said signal when the element is being additionally registered into the circuit data in said working memory; (b) means for judging whether a logic negation rule, stored in said logic negation knowledge base memory, is applicable; (c) means for updating the circuit data and extracting said signal from the circuit data according to said logic negation rule, if said logic negation rule is judged to be application, said signal being equivalent to the logic negation of said specific signal; and (d) means for generating said signal by adding an inverter, which accepts said specific signal, to the circuit data, if said logic negation rule is judged to be inapplicable.

Claim 15

A logic design system comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a logic negation knowledge base memory for storing logic negation rules which express that a circuit is logically equivalent to another circuit; input means for entering a functional description; translation means for translating said functional description into a circuit data which represents a netlist of function macros; a working memory for storing said circuit data; circuit transformation means for transforming said circuit data constituted by a set of function macros into a logically equivalent circuit data constituted by a set of logic cells, comprising: (a) means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) means for matching the condition part of said candidate rule to a circuit data in said working memory and checking an application condition of said candidate rule; and (c) means for applying said candidate rule to the circuit data in said working memory for transforming the circuit after confirming an establishment of the application condition of the candidate rule; and output means for delivering circuit data from said working memory; wherein said means for applying said candidate rule comprises: (a) means for recognizing a subcircuit of the circuit data as a circuit logically equivalent to a circuit described in the condition part of said candidate rule, by using a logic equivalence rule which is stored in said logic equivalence knowledge base memory.

Claim 16

A logic design system comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a logic negation knowledge base memory for storing logic negation rules which express that a circuit is logically equivalent to another circuit; input means for entering a functional description; translation means for translating said functional description into a circuit data which represents a netlist of function macros; a working memory for storing said circuit data; circuit transformation means for transforming said circuit data constituted by a set of function macros into a logically equivalent circuit data constituted by a set of logic cells, comprising: (a) means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) means for matching the condition part of said candidate rule to a circuit data in said working memory and checking an application condition of said candidate rule; and (c) means for applying said candidate rule to the circuit data in said working memory for transforming the circuit after confirming an establishment of the application condition of the candidate rule; and output means for delivering circuit data from said working memory; wherein said means for applying said candidate rule comprises: (a) means for recognizing a subcircuit of the circuit data as a circuit logically equivalent to a circuit described in the condition part of said candidate rule, by using a logic equivalence rule which is stored in said logic equivalence knowledge base memory.

Claim 17

A logic design system according to claim 9, wherein said means for applying said candidate rule further comprises: means for generating a subcircuit, in the circuit data, which is logically equivalent to a circuit described in the conclusion part of the candidate rule, by using a logic equivalence rule which is stored in said logic equivalence knowledge base memory.

Claim 18

A logic design system comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a logic negation knowledge base memory for storing logic negation rules which express that a circuit is logically equivalent to another circuit; input means for entering a functional description; translation means for translating said functional description into a circuit data which represents a netlist of function macros; a working memory for storing said circuit data; circuit transformation means for transforming said circuit data constituted by a set of function macros into a logically equivalent circuit data constituted by a set of logic cells, comprising: (a) means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) means for matching the condition part of said candidate rule to a circuit data in said working memory and checking an application condition of said candidate rule; and (c) means for applying said candidate rule to the circuit data in said working memory for transforming the circuit after confirming an establishment of the application condition of the candidate rule; and output means for delivering circuit data from said working memory; wherein said means for applying said candidate rule comprises: (a) means for recognizing a subcircuit of the circuit data, which is logically equivalent to a circuit described in the conclusion part of the candidate rule, by using a logic equivalence rule which is stored in said logic equivalence knowledge base memory.

Claim 19

A logic design system comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a logic negation knowledge base memory for storing logic negation rules which express that a circuit is logically equivalent to another circuit; input means for entering a functional description; translation means for translating said functional description into a circuit data which represents a netlist of function macros; a working memory for storing said circuit data; circuit transformation means for transforming said circuit data constituted by a set of function macros into a logically equivalent circuit data constituted by a set of logic cells, comprising: (a) means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) means for matching the condition part of said candidate rule to a circuit data in said working memory and checking an application condition of said candidate rule; and (c) means for applying said candidate rule to the circuit data in said working memory for transforming the circuit after confirming an establishment of the application condition of the candidate rule; and output means for delivering circuit data from said working memory; wherein said means for applying said candidate rule comprises: (a) means for recognizing a subcircuit of the circuit data, which is logically equivalent to a circuit described in the conclusion part of the candidate rule, by using a logic equivalence rule which is stored in said logic equivalence knowledge base memory.

Claim 20

A circuit transformation system for transforming a first circuit constituted by a first set of elements into a logically equivalent second circuit constituted by a second set of elements, comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a working memory for storing circuit data which is indicative of a circuit being transformed; input means for entering circuit data into said working memory; output means for delivering circuit data from said working memory; program execution means for storing and executing programs of processing operations including judgements, operations and functions according to said transformation rules; and inference means for inferring the second set of elements on the basis of said circuit transformation information, comprising; (a) rule selection means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) rule holding means for holding said candidate rule; (c) element search means for searching the circuit data stored in said working memory for an element; (d) rule matching means for comparing the condition part of said candidate rule with the circuit data in said working memory using said element search means and said program execution means, and for checking an application condition of said candidate rule; (e) element extraction means for extracting elements to be removed according to elements described in said candidate rule; (f) element removal means for sequentially removing the elements extracted by said element extraction means from the circuit data stored in said working memory after the application condition of said candidate rule is established by said rule matching means; (g) element addition means for additionally registering the element which is extracted from elements described in the conclusion part of said candidate rule into the data stored in said working memory; (h) rule applying means for updating the data in said working memory through additionally registering elements described in said conclusion part by said program execution means after confirming an establishment of said application condition; and (i) rule requisition means for causing said rule selecting means to transmit a new transformation rule to be applied when the conclusion part of said candidate rule is executed by said rule applying means.

Claim 21

A circuit transformation system for transforming a first circuit constituted by a first set of elements into a logically equivalent second circuit constituted by a second set of elements, comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a working memory for storing circuit data which is indicative of a circuit being transformed; input means for entering circuit data into said working memory; output means for delivering circuit data from said working memory; program execution means for storing and executing programs of processing operations including judgements, operations and functions according to said transformation rules; and inference means for inferring the second set of elements on the basis of said circuit transformation information, comprising; (a) rule selection means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) rule holding means for holding said candidate rule; (c) element search means for searching the circuit data stored in said working memory for an element; (d) rule matching means for comparing the condition part of said candidate rule with the circuit data in said working memory using said element search means and said program execution means, and for checking an application condition of said candidate rule; (e) element extraction means for extracting elements to be removed according to elements described in said candidate rule; (f) element removal means for sequentially removing the elements extracted by said element extraction means from the circuit data stored in said working memory after the application condition of said candidate rule is established by said rule matching means; (g) element addition means for additionally registering the element which is extracted from elements described in the conclusion part of said candidate rule into the data stored in said working memory; (h) rule applying means for updating the data in said working memory through additionally registering elements described in said conclusion part by said program execution means after confirming an establishment of said application condition; and (i) rule requisition means for causing said rule selecting means to transmit a new transformation rule to be applied when the conclusion part of said candidate rule is executed by said rule applying means.

Claim 22

A circuit transformation system according to claim 12, wherein said inference means further comprises: rule replacing means for selecting a transformation rule having a condition part of which matches at least a portion of the candidate rule held in the rule holding means, from the knowledge base memory, and for replacing the portion of said candidate rule matched with the condition part of said transformation rule by the conclusion part of said transformation rule.

Claim 23

A circuit transformation system for transforming a first circuit constituted by a first set of elements into a logically equivalent second circuit constituted by a second set of elements, comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a working memory for storing circuit data which is indicative of a circuit being transformed; input means for entering circuit data into said working memory; output means for delivering circuit data from said working memory; program execution means for storing and executing programs of processing operations including judgements, operations and functions according to said transformation rules; and inference means for inferring the second set of elements on the basis of said circuit transformation information, comprising; (a) rule selection means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) rule holding means for holding said candidate rule; (c) element search means for searching the circuit data stored in said working memory for an element; (d) rule matching means for comparing the condition part of said candidate rule with the circuit data stored in said working memory by using said element search means and said program execution means, for checking an application condition of said candidate rule, and for extracting elements to b removed according to elements described in said candidate rule; (e) element storing means for storing said elements to be removed; (f) element removal means for sequentially removing the elements extracted by said element extraction means from the circuit data stored in said working memory after the application condition of said candidate rule is established by said rule matching means; (g) element addition means for additionally registering the element which is extracted from elements described in said candidate rule into the data stored in said working memory; (h) rule applying means for updating the data stored in said working memory through additionally registering elements described in the conclusion part of said candidate rule by said element addition means and executing various processing operations described in the conclusion part by said program execution means after confirming an establishment of said application condition; and (i) rule requisition means for causing said rule selection means to transmit a subordinate transformation rule to be applied when th conclusion part of said candidate rule is executed by said rule applying means.

Claim 24

A circuit transformation system for transforming a first circuit constituted by a first set of elements into a logically equivalent second circuit constituted by a second set of elements, comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a working memory for storing circuit data which is indicative of a circuit being transformed; input means for entering circuit data into said working memory; output means for delivering circuit data from said working memory; program execution means for storing and executing programs of processing operations including judgements, operations and functions according to said transformation rules; and inference means for inferring the second set of elements on the basis of said circuit transformation information, comprising; (a) rule selection means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) rule holding means for holding said candidate rule; (c) element search means for searching the circuit data stored in said working memory for an element; (d) rule matching means for comparing the condition part of said candidate rule with the circuit data stored in said working memory by using said element search means and said program execution means, for checking an application condition of said candidate rule, and for extracting elements to b removed according to elements described in said candidate rule; (e) element storing means for storing said elements to be removed; (f) element removal means for sequentially removing the elements extracted by said element extraction means from the circuit data stored in said working memory after the application condition of said candidate rule is established by said rule matching means; (g) element addition means for additionally registering the element which is extracted from elements described in said candidate rule into the data stored in said working memory; (h) rule applying means for updating the data stored in said working memory through additionally registering elements described in the conclusion part of said candidate rule by said element addition means and executing various processing operations described in the conclusion part by said program execution means after confirming an establishment of said application condition; and (i) rule requisition means for causing said rule selection means to transmit a subordinate transformation rule to be applied when th conclusion part of said candidate rule is executed by said rule applying means.

Claim 25

A circuit transformation system according to claim 14, wherein said inference means further comprises: rule replacing means for selecting a transformation rule of which the condition part matches at least a portion of the candidate rule held in said rule holding means, from the knowledge base memory, and for replacing the portion of said candidate rule matching the condition part of said transformation rule by the conclusion part of said transformation rule.

Claim 26

A circuit transformation system for transforming a first circuit constituted by a first set of elements into a logically equivalent second circuit constituted by a second set of elements, comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a working memory for storing circuit data which is indicative of a circuit being transformed; input means for entering circuit data into said working memory; output means for delivering circuit data from said working memory; a logic negation knowledge base memory for storing logic negation rules which relate a logic circuit to another logic circuit with at least one of plural negated output/input signals; and inference means for inferring the second set of elements on the basis of said circuit transformation knowledge, comprising: (a) rule selection means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) rule matching means for comparing the condition part of said candidate rule with the circuit data stored in said working memory, and for checking the application condition of said candidate rule; (c) element removal means for sequentially removing elements which are extracted from elements described in said candidate rule from the circuit data stored in said working memory after the application condition of said candidate rule is established by said rule matching means; (d) element addition means for additionally registering the element which is extracted from elements described in said candidate rule into the data stored in said working memory; (e) negation signal generating means for extracting and generating the logic negation signal of a specific signal from the data stored in said working memory by making use of said logic negation rules; and (f) rule applying means for updating the data stored in said working memory through additionally registering elements described in the conclusion part of said application rule by said element addition means and for execution various processing operations described in the conclusion part after confirming an establishment of said application condition, wherein said negation signal generating means searches or, if not any, generates, in said date, the signal which expresses the logic negation of said specific signal and is an output/input signal of the element being additionally registered by said element addition means.

Claim 27

A circuit transformation system for transforming a first circuit constituted by a first set of elements into a logically equivalent second circuit constituted by a second set of elements, comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a working memory for storing circuit data which is indicative of a circuit being transformed; input means for entering circuit data into said working memory; output means for delivering circuit data from said working memory; a logic negation knowledge base memory for storing logic negation rules which relate a logic circuit to another logic circuit with at least one of plural negated output/input signals; and inference means for inferring the second set of elements on the basis of said circuit transformation knowledge, comprising: (a) rule selection means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) rule matching means for comparing the condition part of said candidate rule with the circuit data stored in said working memory, and for checking the application condition of said candidate rule; (c) element removal means for sequentially removing elements which are extracted from elements described in said candidate rule from the circuit data stored in said working memory after the application condition of said candidate rule is established by said rule matching means; (d) element addition means for additionally registering the element which is extracted from elements described in said candidate rule into the data stored in said working memory; (e) negation signal generating means for extracting and generating the logic negation signal of a specific signal from the data stored in said working memory by making use of said logic negation rules; and (f) rule applying means for updating the data stored in said working memory through additionally registering elements described in the conclusion part of said application rule by said element addition means and for execution various processing operations described in the conclusion part after confirming an establishment of said application condition, wherein said negation signal generating means searches or, if not any, generates, in said date, the signal which expresses the logic negation of said specific signal and is an output/input signal of the element being additionally registered by said element addition means.

Claim 28

A circuit transformation system according to claim 16, wherein said element addition means includes: judgement means for judging whether each of the output/input signals of an element expresses logic negation of a specific signal, and for extracting said signal, said elements being additionally registered by the element addition means.

Claim 29

A circuit transformation system according to claim 16, wherein said element addition means includes: assignment means for assigning new signal names to undetermined output/input signals of the element which is being additionally registered by the element addition means.

Claim 30

A circuit transformation system according to claim 16, wherein element addition means includes: judgement means for judging whether each signal of the output/input signals of an element expresses logic negation of a specific signal, and for extracting said signal, said elements being additionally registered by the element addition means; and assignment means for assigning undetermined signals out of said output/input signals with new signal names.

Claim 31

A circuit transformation system for transforming a first circuit constituted by a first set of element into a logically equivalent second circuit constituted by a second set of elements, comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules each expressed by a condition part and a conclusion part; a working memory for storing circuit data which is being transformed; input means for entering circuit data into said working memory; output means for delivering circuit data from said working memory; a logic negation knowledge base memory for storing logic equivalence rules which express that a circuit is logically equivalent to another circuit; and inference means for inferring the second set of elements on the basis of said circuit transformation information, comprising: (a) rule selection means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) circuit recognition means for recognizing a subcircuit of the data as a circuit logically equivalent to a circuit described in the condition part of said candidate rule, by using said logic equivalence rules; and (c) rule matching means for comparing the condition part of said candidate rule with the data stored in said working memory by said circuit recognition means, and for checking an application condition of said candidate rule.

Claim 32

A circuit transformation system for transforming a first circuit constituted by a first set of element into a logically equivalent second circuit constituted by a second set of elements, comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules each expressed by a condition part and a conclusion part; a working memory for storing circuit data which is being transformed; input means for entering circuit data into said working memory; output means for delivering circuit data from said working memory; a logic negation knowledge base memory for storing logic equivalence rules which express that a circuit is logically equivalent to another circuit; and inference means for inferring the second set of elements on the basis of said circuit transformation information, comprising: (a) rule selection means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) circuit recognition means for recognizing a subcircuit of the data as a circuit logically equivalent to a circuit described in the condition part of said candidate rule, by using said logic equivalence rules; and (c) rule matching means for comparing the condition part of said candidate rule with the data stored in said working memory by said circuit recognition means, and for checking an application condition of said candidate rule.

Claim 33

A circuit transformation system according to claim 20 wherein said inference means further comprises: element removal means for sequentially removing elements which are extracted from elements described in said candidate rule from the data stored in said working memory, after the application condition of said candidate rule is established by said rule matching means; element addition means for additionally registering the element which is extracted from elements described in said candidate rule into the data stored in said working memory; circuit generating means for generating a subcircuit, in the data, which is logically equivalent to a circuit described in the conclusion part of said candidate rule through said element addition means, by using said logic equivalence rule; and rule applying means for updating the data stored in said working memory, through additionally registering a circuit described in the conclusion part of said candidate rule by said circuit generating means and execution various processing operations described in said conclusion part, after confirming an establishment of said application condition.

Claim 34

A circuit transformation system for transforming a first circuit constituted by a first set of elements into a logically equivalent second circuit constituted by a second set of elements, comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a working memory for storing circuit data which is being transformed; input means for entering circuit data into said working memory; output means for delivering circuit data from said working memory; a logic negation knowledge base memory for storing logic equivalence rules which express that a circuit is logically equivalent to another circuit; and inference means for inferring the second set of elements on the basis of said circuit transformation information, comprising: (a) rule selection means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) rule matching means for comparing the condition part of said candidate rule with the data stored in said working memory, and for checking an application condition of said candidate rule, (c) element removal means of sequentially removing elements which are extracted from elements described in said candidate rule from the data stored in said working memory, after the application condition of said candidate rule is established by said rule matching means; (d) element addition means for additionally registering the element which is extracted from elements described in said candidate rule into the data stored in said working memory; (e) circuit generating means for generating a subcircuit, in the data, which is logically equivalent to a circuit described in the conclusion part of said candidate rule through said element addition means, by using said logic equivalence rules; and (f) rule applying means for updating the data stored in said working memory, through additionally registering a circuit described in the conclusion part of said candidate rule by said circuit generating means and executing various processing operations described in said conclusion part, after confirming an establishment of said application condition.

Claim 35

A circuit transformation system for transforming a first circuit constituted by a first set of elements into a logically equivalent second circuit constituted by a second set of elements, comprising: a knowledge base memory for storing circuit transformation information including plural types of transformation rules, each of the transformation rules being expressed by a condition part and a conclusion part; a working memory for storing circuit data which is being transformed; input means for entering circuit data into said working memory; output means for delivering circuit data from said working memory; a logic negation knowledge base memory for storing logic equivalence rules which express that a circuit is logically equivalent to another circuit; and inference means for inferring the second set of elements on the basis of said circuit transformation information, comprising: (a) rule selection means for selecting a candidate rule, the candidate rule being one of the transformation rules stored in said knowledge base memory; (b) rule matching means for comparing the condition part of said candidate rule with the data stored in said working memory, and for checking an application condition of said candidate rule, (c) element removal means of sequentially removing elements which are extracted from elements described in said candidate rule from the data stored in said working memory, after the application condition of said candidate rule is established by said rule matching means; (d) element addition means for additionally registering the element which is extracted from elements described in said candidate rule into the data stored in said working memory; (e) circuit generating means for generating a subcircuit, in the data, which is logically equivalent to a circuit described in the conclusion part of said candidate rule through said element addition means, by using said logic equivalence rules; and (f) rule applying means for updating the data stored in said working memory, through additionally registering a circuit described in the conclusion part of said candidate rule by said circuit generating means and executing various processing operations described in said conclusion part, after confirming an establishment of said application condition.

Claim 38

A method according to claim 23, wherein said step of applying said candidate rule comprises the steps of: removing elements extracted from elements described in the condition part of said candidate rules from the data stored in said working memory; additionally registering the elements which are extracted from elements described in the conclusion part of said candidate rule into the data stored in said working memory; processing and applying subordinate transformation rules stored in said knowledge base memory.

Claim 41

A method according to claim 25, wherein said step of applying said candidate rule comprises the steps of: removing elements extracted from elements described in the condition part of said candidate rules from the data stored in said working memory; additionally registering the elements which are extracted from elements described in the conclusion part of said candidate rule into the data stored in said working memory; processing an application of subordinate transformation rules stored in said knowledge base memory.