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US5034946A Expired / Lapsed US ⏱️ 0.0 years remaining

Broadband concentrator for packet switch

Assignee: Nytell Software LLC
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Filing: 1989-12-18
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Granted: 1991-07-23
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Expires: 2009-12-18
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Abstract

Abstract A concentrator which concentrates and preserves the order of two lists of packets includes a computation network and a routing network. The computation network computes routing addresses based on concentration bits contained in the packets and the routing network routes the packets to the computed addresses.

Inventors

  • 👤 Slade E. Smith

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 09:38
CPC Classifications
H; H04; H04L; H04L49/00; H04L49/15; H04L49/1507; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04L2012/5603; H04L2012/5609; H04L2012/561; H04L49/25; H04L49/40

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 116 words
A concentrator comprising a plurality of inputs for receiving first and second intermixed groups of packets having logic "1" and logic "0" concentration bits, respectively, a plurality of outputs, a computation network for computing routing addresses for said packets, and a routing network for routing said packets to said routing addresses computed by said computation network so that both groups of packets are concentrated at said outputs, said computation network comprising a running sum adder network for providing a running sum of said concentration bits and means for adding a complement of a number identifying one of said inputs to the running sum of said concentration bits for said packets having a logic "0" concentration bit.
Claim 2
Dependent Claim 116 words
A concentrator comprising a plurality of inputs for receiving first and second intermixed groups of packets having logic "1" and logic "0" concentration bits, respectively, a plurality of outputs, a computation network for computing routing addresses for said packets, and a routing network for routing said packets to said routing addresses computed by said computation network so that both groups of packets are concentrated at said outputs, said computation network comprising a running sum adder network for providing a running sum of said concentration bits and means for adding a complement of a number identifying one of said inputs to the running sum of said concentration bits for said packets having a logic "0" concentration bit.
Claim 3
Independent Claim 86 words
A method for computing routing addresses for first and second intermixed groups of packets received at the inputs of a concentrator and having logic "1" and logic"0" concentration bits, respectively, comprising, for each packet, obtaining a running sum of concentration bits, the routing addresses computed for said first group of packets being equal to the corresponding running sum of concentration bits, and for the second group of packets, adding a complement of an input identifying number to the corresponding running sum to obtain the routing addresses.
Claim 4
Independent Claim 86 words
A method for computing routing addresses for first and second intermixed groups of packets received at the inputs of a concentrator and having logic "1" and logic"0" concentration bits, respectively, comprising, for each packet, obtaining a running sum of concentration bits, the routing addresses computed for said first group of packets being equal to the corresponding running sum of concentration bits, and for the second group of packets, adding a complement of an input identifying number to the corresponding running sum to obtain the routing addresses.
Claim 5
Independent Claim 174 words
A method for concentrating first and second lists of packets having logic "1" and logic "0" concentration bits, respectively, said method comprising the steps of receiving at a computation network the first and second lists of packets, computing at the computation network routing addresses for the packets in said first and second lists, said routing addresses forming a permissible permutation of input addresses for a routing network connected to said computation network, one of said routing addresses computed for a packet of said first list of packets being equal to the corresponding running sum of concentration bits, and one of said routing addresses computed for a packet of said second list of packets being equal to a running sum of the concentration bits plus a complement of a number of an input at which the packet is received at the computation network, and routing said packets through said routing network to said addresses, said packets of each of said first and second lists emerging from said routing network concentrated and with preserved packet order.
Claim 6
Independent Claim 174 words
A method for concentrating first and second lists of packets having logic "1" and logic "0" concentration bits, respectively, said method comprising the steps of receiving at a computation network the first and second lists of packets, computing at the computation network routing addresses for the packets in said first and second lists, said routing addresses forming a permissible permutation of input addresses for a routing network connected to said computation network, one of said routing addresses computed for a packet of said first list of packets being equal to the corresponding running sum of concentration bits, and one of said routing addresses computed for a packet of said second list of packets being equal to a running sum of the concentration bits plus a complement of a number of an input at which the packet is received at the computation network, and routing said packets through said routing network to said addresses, said packets of each of said first and second lists emerging from said routing network concentrated and with preserved packet order.
Claim 7
Dependent Claim 213 words
A packet switch comprising a sorting network, a banyan network, a concentrator interposed between said sorting network and said banyan network, means including a delay loop connecting one or more outputs of said concentrator to one or more inputs of said sorting network, wherein said concentrator comprises computation means for receiving first and second intermixed groups of packets from said sorting network, said first and second groups of packets having a logic "1" and logic "0" concentration bits, respectively, said computation means including means for computing a running sum of the concentration bits of said packets of said first and second groups received at said computation network, wherein each packet of said first group received at said computation network is provided with an address equal to a running sum of the concentration bits, and wherein each packet of said second group received at said computation network is provided with an address equal to a running sum of the concentration bits plus a complement of a number of an input at which the packet is received at the computation network, and routing means for routing said packets of said first group so addressed and ordered to said banyan network and said packets of said second group so addressed and ordered to said delay loop.
Claim 8
Dependent Claim 213 words
A packet switch comprising a sorting network, a banyan network, a concentrator interposed between said sorting network and said banyan network, means including a delay loop connecting one or more outputs of said concentrator to one or more inputs of said sorting network, wherein said concentrator comprises computation means for receiving first and second intermixed groups of packets from said sorting network, said first and second groups of packets having a logic "1" and logic "0" concentration bits, respectively, said computation means including means for computing a running sum of the concentration bits of said packets of said first and second groups received at said computation network, wherein each packet of said first group received at said computation network is provided with an address equal to a running sum of the concentration bits, and wherein each packet of said second group received at said computation network is provided with an address equal to a running sum of the concentration bits plus a complement of a number of an input at which the packet is received at the computation network, and routing means for routing said packets of said first group so addressed and ordered to said banyan network and said packets of said second group so addressed and ordered to said delay loop.
Claim 9
Dependent Claim 211 words
A concentration network comprising a computation network for receiving first and groups of packets having logic "1" and logic "0" concentration bits, respectively, and for computing routing addresses for the packets, said addresses being computed so that when the packets are routed by a routing network to the addresses, the packets of both said first and second groups are concentrated and the order of the packets within both said first and second groups is preserved, said computation network comprising a running sum adder network for providing a running sum of the concentration bits of said packets of said first and second groups received at said computation network, wherein each packet of said first group received at said computation network is provided with an address equal to a running sum of the concentration bits, and wherein each packet of said second group received at said computation network is provided with an address equal to a running sum of the concentration bits plus a complement of a number of an input at which the packet is received at the computation network, and a routing network for routing the packets to the addresses computed by the computation network, the packets of both groups emerging from the routing network concentrated and with their order preserved.
Claim 10
Dependent Claim 211 words
A concentration network comprising a computation network for receiving first and groups of packets having logic "1" and logic "0" concentration bits, respectively, and for computing routing addresses for the packets, said addresses being computed so that when the packets are routed by a routing network to the addresses, the packets of both said first and second groups are concentrated and the order of the packets within both said first and second groups is preserved, said computation network comprising a running sum adder network for providing a running sum of the concentration bits of said packets of said first and second groups received at said computation network, wherein each packet of said first group received at said computation network is provided with an address equal to a running sum of the concentration bits, and wherein each packet of said second group received at said computation network is provided with an address equal to a running sum of the concentration bits plus a complement of a number of an input at which the packet is received at the computation network, and a routing network for routing the packets to the addresses computed by the computation network, the packets of both groups emerging from the routing network concentrated and with their order preserved.

References Cited (Backward Citations)

US4531209A Cited
US4817084A Cited
US4870641A Cited
US4866701A Cited
US4893304A Cited
US4932020A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-07-22 1995-01-21 1995-07-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-07-22 1999-01-21 1999-07-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-07-22 2003-01-21 2003-07-23 $7700.00 Window Closed / Lapsed

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