Compensation of the gate loading loss for travelling wave power amplifiers

Claim 2

A travelling wave power amplifier which comprises: (a) a transmission line pair having an input terminal and an output terminal; (b) a plurality of gallium arsenide transistors, each transistor having a drain coupled to one of said lines of said transmission line pair, a gate coupled to the other line of said pair and a source coupled to a source of reference voltage; (c) a capacitor external to each said transistor coupled between the other of said lines and the gate of each transistor; and (d) a DC bias resistor external to each said transistor coupled between the other of said lines and the gate of each said transistor; (e) said transistors being spaced along said transmission line pair.

Claim 3

A travelling wave power amplifier as set forth in claim 1 wherein capacitors are of increasing capacitance in the direction from the input to the output of said transmission line pair.

Claim 4

A travelling wave power amplifier as set forth in claim 2 wherein the capacitance values of said capacitors are set to provide substantially the same rf voltage across the gate of each transistor.

Claim 5

A travelling wave power amplifier as set forth in claim 3 wherein said transistors are FET transistors.

Claim 6

A travelling wave power amplifier as set forth in claim 2 wherein said transistors are FET transistors.

Claim 7

A travelling wave power amplifier as set forth in claim 1 wherein said capacitors are of varying capacitance value.

Claim 8

A travelling wave power amplifier as set forth in claim 6 wherein the capacitance values of said capacitors are set to provide substantially the same rf voltage across the gate of each transistor.

Claim 9

A travelling wave power amplifier as set forth in claim 7 wherein said transistors are FET transistors.

Claim 10

A travelling wave power amplifier as set forth in claim 6 wherein said transistors are FET transistors.

Claim 11

A travelling wave power amplifier as set forth in claim 1 wherein the capacitance values of said capacitors are set to provide substantially the same rf voltage across the gate of each transistor.

Claim 12

A travelling wave power amplifier as set forth in claim 10 wherein said transistors are FET transistors.

Claim 13

A travelling wave power amplifier as set forth in claim 1 wherein said transistors are FET transistors.

Claim 14

A distributed amplifier having an input terminal and an output terminal comprising: a plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors, which are the only capacitors coupled to said input electrodes, for capacitively coupling each one of the input electrodes of the plurality of transistors only to the input terminal; and second means for cascade interconnecting the output electrode of each transistor having a first end coupled to the output terminal.

Claim 15

A distributed amplifier having an input terminal and an output terminal comprising: a plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors, which are the only capacitors coupled to said input electrodes, for capacitively coupling each one of the input electrodes of the plurality of transistors only to the input terminal; and second means for cascade interconnecting the output electrode of each transistor having a first end coupled to the output terminal.

Claim 16

The distributed amplifier as recited in claim 13 wherein the coupling means further includes a transmission line and wherein each capacitor is coupled between said transmission line and the corresponding one of the input electrodes of the transistors.

Claim 17

A distributed amplifier having an input terminal and an output terminal comprising: a plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors for capacitively coupling each one of the input electrodes of the plurality of transistors only to the input terminal; second means for cascade interconnecting the output electrodes of each transistor having a first end coupled to the output terminal; wherein each transistor further comprises: a reference electrode; and a reactive component between the input electrode and the reference electrode; wherein an input radio frequency signal is fed to the input terminal; and wherein the value of capacitance for each one of said plurality of capacitors is selected in accordance with the value of the reactive component of each transistor to provide a predetermined portion of the input radio frequency signal to said transistors.

Claim 18

A distributed amplifier having an input terminal and an output terminal comprising: a plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors for capacitively coupling each one of the input electrodes of the plurality of transistors only to the input terminal; second means for cascade interconnecting the output electrodes of each transistor having a first end coupled to the output terminal; wherein each transistor further comprises: a reference electrode; and a reactive component between the input electrode and the reference electrode; wherein an input radio frequency signal is fed to the input terminal; and wherein the value of capacitance for each one of said plurality of capacitors is selected in accordance with the value of the reactive component of each transistor to provide a predetermined portion of the input radio frequency signal to said transistors.

Claim 19

The distributed amplifier as recited in claim 15 wherein the value of capacitance for each of said capacitors is selected to provide substantially uniform predetermined portions of the input radio frequency signal.

Claim 20

A distributed amplifier having an input terminal and an output terminal comprising: a plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors for capacitively coupled each one of the input electrodes of the plurality of transistors only to the input terminal; second means for cascade interconnecting the output electrode of each transistor having a first end coupled to the output terminal; wherein the transistors further comprises: a reference electrode; and a reactive component between the input electrode and the reference electrode of each transistor; wherein the first means has an impedance in accordance with the impedance of the reactive element between each input electrode and the grounded electrode and the reactance of the corresponding capacitor to provide the amplifier with a predetermined input impedance.

Claim 21

A distributed amplifier having an input terminal and an output terminal comprising: a plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors for capacitively coupled each one of the input electrodes of the plurality of transistors only to the input terminal; second means for cascade interconnecting the output electrode of each transistor having a first end coupled to the output terminal; wherein the transistors further comprises: a reference electrode; and a reactive component between the input electrode and the reference electrode of each transistor; wherein the first means has an impedance in accordance with the impedance of the reactive element between each input electrode and the grounded electrode and the reactance of the corresponding capacitor to provide the amplifier with a predetermined input impedance.

Claim 22

A distributed amplifier having an input terminal and an output terminal comprising: a first plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors, which are the only capacitors coupled to said input electrode, for capacitively coupling each one of the input electrodes of the plurality of transistors only to the input terminal, a second plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; second means, including a second plurality of capacitors, which are the only capacitors coupled to said input electrode, for capacitively coupling each of said input electrodes of the second plurality of transistors to the input terminal; and a common means for electrically interconnecting the output electrode of each one of said transistors to the output terminal.

Claim 23

A distributed amplifier having an input terminal and an output terminal comprising: a first plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors, which are the only capacitors coupled to said input electrode, for capacitively coupling each one of the input electrodes of the plurality of transistors only to the input terminal, a second plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; second means, including a second plurality of capacitors, which are the only capacitors coupled to said input electrode, for capacitively coupling each of said input electrodes of the second plurality of transistors to the input terminal; and a common means for electrically interconnecting the output electrode of each one of said transistors to the output terminal.

Claim 24

A distributed amplifier having an input terminal and an output terminal comprising: a first plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors for capacitively coupling each one of the input electrodes of the plurality of transistors only to the input terminal, a second plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; second means, including a second plurality of capacitors, for capacitively coupled each of said input electrodes of the second plurality of transistors to the input terminal; and a common means for electrically interconnecting the output electrode of each one of said transistors to the output terminal; wherein the output electrode of each one of the first plurality of transistors is coupled at a corresponding one of a plurality of common junctions of said common means with the output electrode of each one of the second plurality of transistors.

Claim 25

A distributed amplifier having an input terminal and an output terminal comprising: a first plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors for capacitively coupling each one of the input electrodes of the plurality of transistors only to the input terminal, a second plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; second means, including a second plurality of capacitors, for capacitively coupled each of said input electrodes of the second plurality of transistors to the input terminal; and a common means for electrically interconnecting the output electrode of each one of said transistors to the output terminal; wherein the output electrode of each one of the first plurality of transistors is coupled at a corresponding one of a plurality of common junctions of said common means with the output electrode of each one of the second plurality of transistors.

Claim 26

A distributed amplifier having an input terminal and an output terminal comprising: a first plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors for capacitively coupling each one of the input electrodes of the plurality of transistors only to the input terminal, a second plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; second means, including a second plurality of capacitors, for capacitively coupling each of said input electrodes of the second plurality of transistors to the input terminal; and a common means for electrically interconnecting the output electrode of each one of said transistors to the output terminal; wherein the first and second coupling means each further comprise a transmission line and wherein each capacitor is coupled between said transmission line and a corresponding one of input electrodes of the transistor.

Claim 27

A distributed amplifier having an input terminal and an output terminal comprising: a first plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors for capacitively coupling each one of the input electrodes of the plurality of transistors only to the input terminal, a second plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; second means, including a second plurality of capacitors, for capacitively coupling each of said input electrodes of the second plurality of transistors to the input terminal; and a common means for electrically interconnecting the output electrode of each one of said transistors to the output terminal; wherein the first and second coupling means each further comprise a transmission line and wherein each capacitor is coupled between said transmission line and a corresponding one of input electrodes of the transistor.

Claim 28

A distributed amplifier having an input terminal and an output terminal comprising: a first plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors for capacitively coupling each one of the input electrodes of the plurality of transistors only to the input terminal, a second plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; second means, including a second plurality of capacitors, for capacitively coupling each of said input electrodes of the second plurality of transistors to the input terminal; and a common means for electrically interconnecting the output electrode of each one of said transistors to the output terminal; wherein each transistor includes: a reference electrode; a reactive component between the input electrode and the reference electrode; wherein an input radio frequency signal is fed to the input terminal; and wherein the value of capacitance for each one of said plurality of capacitors is selected in accordance with the value of the reactive component of each transistor to provide a predetermined portion of the input radio frequency signal to said transistors.

Claim 29

A distributed amplifier having an input terminal and an output terminal comprising: a first plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; first means including a plurality of capacitors for capacitively coupling each one of the input electrodes of the plurality of transistors only to the input terminal, a second plurality of successively coupled transistors, each one thereof having an input electrode and an output electrode; second means, including a second plurality of capacitors, for capacitively coupling each of said input electrodes of the second plurality of transistors to the input terminal; and a common means for electrically interconnecting the output electrode of each one of said transistors to the output terminal; wherein each transistor includes: a reference electrode; a reactive component between the input electrode and the reference electrode; wherein an input radio frequency signal is fed to the input terminal; and wherein the value of capacitance for each one of said plurality of capacitors is selected in accordance with the value of the reactive component of each transistor to provide a predetermined portion of the input radio frequency signal to said transistors.

Claim 30

The distributed amplifier as recited in claim 21 wherein the value of capacitance for each of said capacitors is selected to provide substantially uniform predetermined portions of the input radio frequency signal.

Claim 31

A distributed amplifier having an input terminal and an output terminal comprising: a first plurality of successively coupled field effect transistors with cascaded gate electrodes, cascaded drain electrodes, a first one of such field effect transistors having the gate electrode thereof coupled to the input terminal, such terminal being adapted to receive an input radio frequency signal, and the last one of the successively coupled field effect transistors having the drain electrode thereof coupled to an output terminal, said output terminal being adapted to provide an amplified output radio frequency signal; first means, coupled to each one of the gate electrodes of the first plurality of field effect transistors, for providing separate bias and radio frequency signal paths; a second like plurality of successively coupled field effect transistors with cascaded gate electrodes, cascaded drain electrodes, a first one of such field effect transistors having the gate electrode thereof coupled to the input terminal and the last one of the successively coupled field effect transistors having the drain electrode thereof coupled to the output terminal; second means, coupled to each one of the gate electrodes of the second plurality of field effect transistors, for providing separate bias and radio frequency signal paths; and common means, for electrically interconnecting the drain electrode of each one of the field effect transistors to the output terminal of the distributed amplifier.

Claim 32

A distributed amplifier having an input terminal and an output terminal comprising: a first plurality of successively coupled field effect transistors with cascaded gate electrodes, cascaded drain electrodes, a first one of such field effect transistors having the gate electrode thereof coupled to the input terminal, such terminal being adapted to receive an input radio frequency signal, and the last one of the successively coupled field effect transistors having the drain electrode thereof coupled to an output terminal, said output terminal being adapted to provide an amplified output radio frequency signal; first means, coupled to each one of the gate electrodes of the first plurality of field effect transistors, for providing separate bias and radio frequency signal paths; a second like plurality of successively coupled field effect transistors with cascaded gate electrodes, cascaded drain electrodes, a first one of such field effect transistors having the gate electrode thereof coupled to the input terminal and the last one of the successively coupled field effect transistors having the drain electrode thereof coupled to the output terminal; second means, coupled to each one of the gate electrodes of the second plurality of field effect transistors, for providing separate bias and radio frequency signal paths; and common means, for electrically interconnecting the drain electrode of each one of the field effect transistors to the output terminal of the distributed amplifier.

Claim 33

The distributed amplifier as recited in claim 23 wherein electrical pathlengths between the input terminal and the output terminal through each one of the field effect transistors are substantially equal.

Claim 34

The distributed amplifier as recited in claim 24 wherein the field effect transistors further comprise a reference electrode and a reactive component between the gate electrode and reference electrode of each field effect transistor; and wherein each one of the first and second means comprise a transmission line and a plurality of capacitors, with each capacitor being coupled between said transmission line and a corresponding one of said gate electrodes of the field effect transistors, and wherein said transmission line has an impedance in accordance with the impedance of the reactive element between each gate electrode and reference electrode and the impedance of the corresponding capacitor to provide the distributed amplifier with a predetermined input impedance.

Claim 35

The distributed amplifier as recited in claim 25 wherein each field effect transistor includes a reactive element between the drain electrode and the reference electrode and wherein the coupling means includes a common transmission line having a characteristic impedance in accordance with the impedance of the reactive element between drain and reference electrodes of each field effect transistor to provide the distributed amplifier with a predetermined output impedance.

Claim 36

The distributed amplifier as recited in claim 23 wherein the first and second means each include a transmission line, a plurality of capacitors, with each capacitor being coupled between said transmission line and a corresponding one of gate electrodes of the field effect transistor to provide the radio frequency path; and a like plurality of resistors, each one coupled between a common bias line and a corresponding one of said input electrodes.

Claim 37

The distributed amplifier as recited in claim 27 wherein each field effect transistor includes a reference electrode and a reactive component between the gate electrode and reference electrode; and wherein the value of capacitance for each one of said plurality of capacitors is selected in accordance with the value of the reactive component of each field effect transistor to provide predetermined radio frequency input signals to said field effect transistors.