Thin film magnetic memory elements

Claim 2

A thin film magnetic memory element, comprising: a single crystal substrate; and a closure domain on top of said substrate, wherein said closure domain is a single crystal magnetic film which is lattice-matched to said substrate, said closure domain includes a plurality of legs, with each of said legs being oriented along an easy axis of said single crystal magnetic film with said legs joining at domain walls.

Claim 3

The magnetic memory element of claim 1, wherein said memory element further includes: a first insulating layer on top of said closure domain; and means for magnetizing the closure domain in one of a first and second directions, whereby said closure domain can be magnetized in said first direction indicating a "1" bit or said second direction, opposite said first direction, indicating a "0" bit.

Claim 4

The magnetic memory element of claim 2, wherein said means for magnetizing said closure domain in one of a first direction and a second direction comprises: a conducting film deposited on said first insulating layer, said conducting film is etched in the shape of a "maltese cross" such that the domain walls of said closure domain are left uncovered; a second insulating layer above said conducting film which has holes etched therein for making contact to said conducting film; and means for making electrical connection to said conducting film for magnetizing said closure domain in one of a first direction and a second direction, opposite said first direction.

Claim 5

The magnetic memory element of claim 2, wherein said means for magnetizing said closure domain in one of a first direction and a second directions comprises: a conducting film deposited on said first insulating layer and etched in a shape such that portions of the domain walls of said closure domain are left uncovered; a second insulating layer above said conducting film which has holes etched therein for making contact with said conducting film; and means for making electrical connection to said conducting film for magnetizing said closure domain in one of a first direction and a second direction, opposite said first direction.

Claim 6

The magnetic memory element of claim 1 wherein the single crystal magnetic film is iron which is oriented in the (100) direction and the substrate is GaAs which is oriented in the (100) direction.

Claim 7

The magnetic memory element of claim 1 wherein the single crystal magnetic film is iron which is oriented in the (111) direction and the substrate is GaAs which is oriented in the (111) direction.

Claim 8

The magnetic memory element of claim 1, further comprising a means for reading the direction of magnetization of said closure domain.

Claim 9

The magnetic memory element of claim 7, wherein said means for reading the direction of magnetization of said closure domain comprises: a Hall bar which has been deposited into a cut in the closure domain; an FET structure which has been prepared in said single crystal substrate by appropriately doping said substrate to form source and drain regions; said Hall bar is positioned above said FET structure; and means for injecting a Hall current through said Hall bar such that the magnetic field across the Hall bar due to its being located in a magnetic circuit gap in the closure domain will cause a Hall voltage to be generated on the top and bottom surfaces of the Hall bar, such that the bottom surface acts as a gate of said FET structure, whereby the signal through the FET will read the direction of magnetization of the magnetic memory element.

Claim 10

An array of thin film magnetic memory elements on a chip, comprises: a single crystal substrate; and a plurality of closure domains on top of said substrate, wherein said plurality of closure domains are formed from a single crystal magnetic film which is lattice-matched to said substrate, each of said plurality of closure domains includes a plurality of legs, with each of said legs being oriented along an easy axis of said single crystal magnetic film with said legs joining at domain walls.

Claim 11

An array of thin film magnetic memory elements on a chip, comprises: a single crystal substrate; and a plurality of closure domains on top of said substrate, wherein said plurality of closure domains are formed from a single crystal magnetic film which is lattice-matched to said substrate, each of said plurality of closure domains includes a plurality of legs, with each of said legs being oriented along an easy axis of said single crystal magnetic film with said legs joining at domain walls.

Claim 12

The array of thin film magnetic memory elements of claim 9, further comprising: a first insulating layer deposited on top of said plurality of closure domains; and means for magnetizing said plurality of closure domains in one of a first and second directions, whereby said closure domains can be magnetized in said first direction indicating a "1" bit or said second direction, opposite said first direction, indicating a "0" bit.

Claim 13

The array of thin film magnetic memory elements of claim 10, wherein said means for magnetizing said plurality of closure domains in one of a first direction and a second direction comprises: a conducting film deposited above said first insulating layer, said conducting film is etched in the shape of a "maltese cross" above each of said plurality of closure domains, such that the domain walls of said plurality of closure domains are left uncovered; a second insulating layer above said conducting film which has holes etched therein for making contact to said conducting film; and means for making electrical connection to said conducting film for magnetizing each of said plurality of closure domains in one of a first direction and a second direction.

Claim 14

The array of thin film magnetic memory elements of claim 10, wherein said means for magnetizing said plurality of closure domains in one of a first direction and a second direction comprises: a conducting film deposited on said first insulating layer and etched in a shape above each of said plurality of closure domains such that a portion of each domain wall of said plurality of closure domains is left uncovered; a second insulating layer above said conducting film which has holes etched therein for making contact to said conducting film; and means for making electrical connection to said conducting film for magnetizing each of said plurality of closure domains in one of a first direction and a second direction.

Claim 15

The array of thin film magnetic memory elements of claim 9, wherein the magnetic film is iron which is oriented in the (100) direction and the substrate is GaAs which is oriented in the (100) direction.

Claim 16

The array of thin film magnetic memory elements of claim 9, wherein said magnetic film is iron which is oriented in the (111) direction and the substrate is GaAs which is oriented in the (111) direction.

Claim 17

The array of thin film magnetic memory elements of claim 9, further comprising means for reading the direction of magnetization of said plurality of closure domains.

Claim 18

The array of thin film magnetic memory elements of claim 15, wherein said means for reading the direction of magnetization of said plurality of closure domains comprises: a plurality of Hall bars, wherein each of said Hall bars has been deposited into a cut in each of said closure domains; an plurality of FET structures, corresponding to each of said closure domain, which have been prepared in said single crystal substrate by appropriately doping said substrate to form source and drain regions for each of said closure domains; each of said Hall bars is positioned above said corresponding FET structure; and means for injecting a Hall current through each of said Hall bars such that the magnetic field across the Hall bars due to its being located in a magnetic circuit gap in the closure domain will cause a Hall voltage to be generated on the top and bottom surfaces of the Hall bar, such that the bottom surface of said Hall bar acts as a gate of said FET structure, whereby the signal through the FET will read the direction of magnetization of a corresponding magnetic memory element.