US5023872A
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US
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FDDI bit error rate tester
Assignee: RPX Corp
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Filing: 1988-03-25
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Granted: 1991-06-11
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Expires: 2008-03-25
Abstract
Abstract Methods and apparatus are set forth which facilitate continuous bit error rate monitoring at the physical (PHY) management layer in a Fiber Distributed Data Interface (FDDI), duel token ring network. The monitoring is performed using existing line status information from PHY. Simple error detection logic. In combination with an error counter and a timer, is used to detect errors during active or idle line state conditions, independent of Media Access Control (MAC) layer support.
Inventors
- 👤 Kadiresan Annamalai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 00:33
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/28; H04L12/42; H04L12/427; H04L12/433; H04L1/00; H04L1/20; H04L43/00; H04L43/08; H04L43/0823; H04L43/0847; H04L43/16; H04L43/50
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
228 words
Apparatus for performing continuous bit error rate monitoring at the physical (PHY) layer in each node of a Fiber Distributed Data Interface (FDDI) dual token ring network wherein each node in said network also includes a Station Management (SMT) layer, a Media Access Control (MAC) layer, a line state signal generator for generating a predetermined set of line state signals under predetermined conditions, and a byte clock signal generator for generating clocking signals, comprising: (a) tester logic means, coupled to said line state signal generator, for outputting error event signals as a function of a first subset of said set of line state signals which include an Active Line State (ALS) signal, an Idle Line State (ILS) signal and a Line State Unknown (LSU) signal; (b) resettable error count means, coupled to said tester logic means, enabled whenever an error event signal is output by said tester logic means, for accumulating an error event count and providing an output signal indicative of said error event count; and (c) resettable timer means, coupled to said line state signal generator and said byte clock signal generator, enabled as a function of a second subset of said set of line state signals, for accumulating a measure of the time elapsed from timer means enablement until timer means reset, and for providing an output signal indicative of said measure of elapsed time.
Claim 2
Dependent Claim
228 words
Apparatus for performing continuous bit error rate monitoring at the physical (PHY) layer in each node of a Fiber Distributed Data Interface (FDDI) dual token ring network wherein each node in said network also includes a Station Management (SMT) layer, a Media Access Control (MAC) layer, a line state signal generator for generating a predetermined set of line state signals under predetermined conditions, and a byte clock signal generator for generating clocking signals, comprising: (a) tester logic means, coupled to said line state signal generator, for outputting error event signals as a function of a first subset of said set of line state signals which include an Active Line State (ALS) signal, an Idle Line State (ILS) signal and a Line State Unknown (LSU) signal; (b) resettable error count means, coupled to said tester logic means, enabled whenever an error event signal is output by said tester logic means, for accumulating an error event count and providing an output signal indicative of said error event count; and (c) resettable timer means, coupled to said line state signal generator and said byte clock signal generator, enabled as a function of a second subset of said set of line state signals, for accumulating a measure of the time elapsed from timer means enablement until timer means reset, and for providing an output signal indicative of said measure of elapsed time.
Claim 3
Dependent Claim
33 words
Apparatus as set forth in claim 1 wherein said tester logic outputs an error event signal upon the occurrence of n LSU signal(s) in the ALS and m LSU signal(s) in the ILS.
Claim 4
Dependent Claim
11 words
Apparatus as set forth in claim 2 where n=4 and m=1.
Claim 5
Dependent Claim
35 words
Apparatus as set forth in claim 2 wherein said second subset of said set of line state signals comprises a QUIET line state signal, a HALT line state signal and a MASTER line state signal.
Claim 6
Dependent Claim
49 words
Apparatus as set forth in claim 4 wherein said timer means is also reset upon the presence of any of a third set of signals comprised of a timer expiration signal, a full count signal and an external system reset signal generated by upper management in the FDDI network.
Claim 7
Dependent Claim
23 words
Apparatus as set forth in claim 5 wherein the detection and isolation of a bad link is performed independent of said MAC layer.
Claim 8
Dependent Claim
43 words
Apparatus as set forth in claim 1 wherein said timer means may be programmed, by inputting a maximum elapsed time input signal, to generate a timer expiration signal whenever the timer means is enabled and reaches said maximum elapsed time before being reset.
Claim 9
Dependent Claim
44 words
Apparatus as set forth in claim 7 wherein said error count means may be programmed, by inputting a maximum error count input signal, to generate a full count signal whenever the count means is enabled and reaches said maximum error count before being reset.
Claim 10
Dependent Claim
37 words
Apparatus as set forth in claim 8 further comprising storage means, coupled to said timer means and said error count means, for storing said signal indicative of error event count whenever said timer expiration signal is generated.
Claim 11
Dependent Claim
44 words
Apparatus as set forth in claim 9 further comprising means for detecting a bad link, coupled to said timer means and said error count means, which generates a signal indicating a bad link if said full count signal is generated prior to timer expiration.
Claim 12
Independent Claim
140 words
A method for isolating faults in a high speed FDDI token ring network, comprising the steps of: (a) utilizing line state information at the PHY layer of the FDDI network to detect and signal error events including counting n occurrences of Line State Unknown (LSU) in Active Line State (ALS) and counting m occurrences of LSU in Idle Line State (ILS) before signalling an error event; (b) outputting an error event signal for each detected error event; (c) counting signalled error events over a predetermined monitoring interval to develop an accumulated error count; (d) comparing said accumulated error count with a preselected maximum error count value; (e) periodically storing said accumulated error count value; (f) signalling a bad link to upper FDDI management whenever said accumulated error count equals said maximum error count value before expiration of the monitoring interval.
Claim 13
Independent Claim
140 words
A method for isolating faults in a high speed FDDI token ring network, comprising the steps of: (a) utilizing line state information at the PHY layer of the FDDI network to detect and signal error events including counting n occurrences of Line State Unknown (LSU) in Active Line State (ALS) and counting m occurrences of LSU in Idle Line State (ILS) before signalling an error event; (b) outputting an error event signal for each detected error event; (c) counting signalled error events over a predetermined monitoring interval to develop an accumulated error count; (d) comparing said accumulated error count with a preselected maximum error count value; (e) periodically storing said accumulated error count value; (f) signalling a bad link to upper FDDI management whenever said accumulated error count equals said maximum error count value before expiration of the monitoring interval.
Claim 14
Dependent Claim
12 words
A method as set forth in claim 11 wherein n=4 and m=1.
Claim 15
Independent Claim
187 words
A method for performing continuous bit error rate monitoring at the physical (PHY) layer in each node of a Fiber Distributed Data Interface (FDDI) duel token ring network, wherein each node in said network also includes a Station Management (SMT) layer, a Media Access Control (MAC) layer, a line state signal generator for generating a predetermined set of line state signals under predetermined conditions, and a byte clock signal generator for generating clocking signals, comprising the steps of: (a) determining error events, and outputting error event signals, as a function of said line state signals including utilizing Active Line State (ALS), Idle Line State (ILS) and Line State Unknown (LSU) signals present at the PHY layer, independent of MAC layer support; (b) accumulating an error event count and generating an output signal, indicative of said accumulated error event count over a preselected time interval, for storage at the end of said time interval; (c) comparing said accumulated error count with a preselected maximum error count; and (d) signalling a bad link if said maximum error count is reached prior to the expiration of said preselected time interval.
Claim 16
Independent Claim
187 words
A method for performing continuous bit error rate monitoring at the physical (PHY) layer in each node of a Fiber Distributed Data Interface (FDDI) duel token ring network, wherein each node in said network also includes a Station Management (SMT) layer, a Media Access Control (MAC) layer, a line state signal generator for generating a predetermined set of line state signals under predetermined conditions, and a byte clock signal generator for generating clocking signals, comprising the steps of: (a) determining error events, and outputting error event signals, as a function of said line state signals including utilizing Active Line State (ALS), Idle Line State (ILS) and Line State Unknown (LSU) signals present at the PHY layer, independent of MAC layer support; (b) accumulating an error event count and generating an output signal, indicative of said accumulated error event count over a preselected time interval, for storage at the end of said time interval; (c) comparing said accumulated error count with a preselected maximum error count; and (d) signalling a bad link if said maximum error count is reached prior to the expiration of said preselected time interval.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-06-10 | 1994-12-10 | 1995-06-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-06-10 | 1998-12-10 | 1999-06-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-06-10 | 2002-12-10 | 2003-06-11 | $7700.00 | Window Closed / Lapsed |