← Back to Patent Explorer
US5023770A Expired / Lapsed US ⏱️ 0.0 years remaining

High-speed press control system

Assignee: Schneider Electric USA Inc
•
Filing: 1988-04-11
•
Granted: 1991-06-11
•
Expires: 2008-04-11
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A high-speed press control system including a control processor and an associated scan processor for executing a press algorithm providing timed interrupts and consisting of identical programmable sub-algorithms to control output and input registers. The high-speed press control system has the capability of monitoring and reacting to press position every 2.5 ms.

Inventors

  • 👤 Erich H. Siverling

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 23:10
CPC Classifications
G; G05; G05B; G05B19/00; G05B19/02; G05B19/04; G05B19/05; G05B19/054; G05B2219/00; G05B2219/10; G05B2219/11; G05B2219/1151; G05B2219/1159; G05B2219/15; G05B2219/15102

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 127 words
A programmable logic controller (PLC) for controlling a high-speed machine operating in cycle-type modes, the machine having a plurality of components having at least two status states, the PLC comprising: an executive memory, an image memory including an input image table and an output image table, a machine control algorithm, an internal clock for generating repetitive timed interrupts, a control processor for coordinating operation of the system in accordance with instructions contained in said executive memory, including updating of said image memory; a communication bus adapted for communicating with the machine; and a scan processor having its own executive memory, said scan processor for reading said input image table, executing said machine control algorithm and updating said output image table in response to said repetitive timed interrupts.
Claim 2
Dependent Claim 127 words
A programmable logic controller (PLC) for controlling a high-speed machine operating in cycle-type modes, the machine having a plurality of components having at least two status states, the PLC comprising: an executive memory, an image memory including an input image table and an output image table, a machine control algorithm, an internal clock for generating repetitive timed interrupts, a control processor for coordinating operation of the system in accordance with instructions contained in said executive memory, including updating of said image memory; a communication bus adapted for communicating with the machine; and a scan processor having its own executive memory, said scan processor for reading said input image table, executing said machine control algorithm and updating said output image table in response to said repetitive timed interrupts.
Claim 3
Dependent Claim 17 words
The PLC of claim 1, wherein the algorithm resides in said executive memory of said scan processor.
Claim 4
Dependent Claim 21 words
The PLC of claim 1, wherein the algorithm is executed in response to said repetitive timed interrupts by said scan processor.
Claim 5
Dependent Claim 14 words
The PLC of claim 1, wherein the algorithm comprises a multiple function block software.
Claim 6
Dependent Claim 16 words
The PLC of claim 1, wherein the algorithm comprises multiple executions of substantially the same sub-algorithm.
Claim 7
Dependent Claim 28 words
The PLC of claim 1, wherein the control processor provides control commands to said scan processor and receives inputs from said scan processor for communicating with the machine.
Claim 8
Dependent Claim 37 words
The PLC of claim 1, further including a user memory for containing the user program, and said user memory connecting directly to said scan processor, said user program controlling the operation and sequence of said scan processor.
Claim 9
Dependent Claim 26 words
The PLC of claim 1, wherein the repetitive timed interrupt is a multiple of 2.5 milliseconds and wherein the image memory is updated every scan cycle.

References Cited (Backward Citations)

US4129901A Cited
US4122519A Cited
US4404651A Cited
US4716541A Cited
US4742443A Cited
US4807178A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-06-10 1994-12-10 1995-06-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-06-10 1998-12-10 1999-06-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-06-10 2002-12-10 2003-06-11 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag