Content addressable memory

Abstract

Abstract A content addressable memory consists of a plurality of memory units each of which may be an integrated circuit. Each unit receives an input group of digits forming all or part of an input key code, and compares it simultaneously with a plurality of equally sized groups of digits stored in the memory of the unit. The memory of a unit has 32K bytes of storage elements functionally arranged in 512 rows and column. The 64 bytes forming a row are each compared with an input group of 8 binary digits. A status bit is produced for each of the 64 bytes of a row and indicates whether or not the input group matches the particular byte. The match need not be perfect and certain digits may be masked so that comparison of them does not detract from the match assessment. The status bits are combined logically to produce higher and higher order status bits selectively indicating the presence of a match in larger and larger groups of storage elements up to the entire memory of the unit. The single highest level status bit from each unit is combined logically with similar bits from other units to produce even higher order status bits. The status bits are stored so that the addresses of groups matching the input group can be discovered from then. For an input key code having several input groups of digits, the input groups are applied sequentially to the units. The units also produce a "just one" output when only a single match to an input group is found. The "just one" outputs are combined logically to produce a hierarchy of "just one" outputs similar to that of the status bits. For a multi-input group key code, the "just one" output can be used to terminate the search before all input groups have been searched for.

Inventors

• 👤 Martin Oates

Bibliographic Details