Method and apparatus for driving a DC motor

Claim 2

A control circuit for a DC motor, said control circuit comprising: a. driver means for applying a phase current to coils of a DC motor in accordance with a commutation sequence, said driver means including a plurality of FET current sink transistors, each transistors, each current sink transistor corresponding to one of said coils of said DC motor; b. sensing means for sensing a drain-to-source voltage of one of said current sink transistors when an ON gate voltage is applied thereto by said driver means and applying said drain-to-source voltage across a drain and source of an FET reference transistor; c. means for supplying said ON gate voltage to a gate of said FET reference transistor thereby inducing a reference current to flow through said FET reference transistor that is proportional to a current flowing through said current sink transistor that has said ON gate voltage applied thereto; and d. means for generating a feedback current based on said reference current that is proportional to the drain-to-source voltage sensed by said sensing means and inversely proportional to a drain-to-source resistance of said FET reference transistor; e. comparing means for comparing said feedback current to a secondary reference current and controlling an operating current level of said DC motor in response thereto.

Claim 3

A control circuit for a DC motor as claimed in claim 1, further comprising means for selecting the value of said secondary reference current.

Claim 4

A control circuit for a DC motor as claimed in claim 1, wherein said comparing means includes means for reducing said secondary reference current by a predetermined percentage when said feedback current exceeds said secondary reference current and for returning said secondary reference current to normal when said reference current decreases to said secondary reference current.

Claim 5

A control circuit for a DC motor as claimed in claim 1, wherein said FET reference transistor is sized so that it has a small fraction of the number of cells as said current sink transistor.

Claim 6

A control circuit for a DC motor as claimed in claim 4, wherein said FET reference transistor has 1/1000 the cell size as said current sink transistor.

Claim 7

A control circuit for a DC motor, said control circuit comprising: a. a plurality of phase driver circuits, each phase driver circuit including an FET current sink transistor; b. control circuitry coupled to said plurality of phase driver circuits to drive said phase driver circuits in accordance with a commutation sequence; c. a comparator circuit coupled to said phase driver circuits, said comparator circuit including a first amplifier having a first input coupled to a FET reference transistor and a second input selectively coupled to one of aid current sink transistors of said phase driver circuits such that a drain-to-source voltage of said one current sink transistor is applied to said reference transistor; d. means for applying an ON gate voltage to said current sink transistor that is selectively coupled to said second input and to said reference transistor wherein a first reference current is induced in said reference transistor that is proportional to a sink current flowing through said current sink transistor that is selectively coupled to said second input and said comparator circuit generates a feedback current based on said first reference current that is proportional to the drain-to-source voltage of the current sink transistor and inversely proportional to the drain-to-source resistance of said reference transistor, and e. a second amplifier coupled selectively coupled to at least one input voltage source, a second gain setting resistor, and said comparator circuit, said second amplifier generating a second reference current that is supplied to said comparator circuit wherein said comparator circuit compares said feedback current to said second reference current and the operating current of the DC motor is controlled in response thereto.

Claim 8

A control circuit for a DC motor, said control circuit comprising: a. a plurality of phase driver circuits, each phase driver circuit including an FET current sink transistor; b. control circuitry coupled to said plurality of phase driver circuits to drive said phase driver circuits in accordance with a commutation sequence; c. a comparator circuit coupled to said phase driver circuits, said comparator circuit including a first amplifier having a first input coupled to a FET reference transistor and a second input selectively coupled to one of aid current sink transistors of said phase driver circuits such that a drain-to-source voltage of said one current sink transistor is applied to said reference transistor; d. means for applying an ON gate voltage to said current sink transistor that is selectively coupled to said second input and to said reference transistor wherein a first reference current is induced in said reference transistor that is proportional to a sink current flowing through said current sink transistor that is selectively coupled to said second input and said comparator circuit generates a feedback current based on said first reference current that is proportional to the drain-to-source voltage of the current sink transistor and inversely proportional to the drain-to-source resistance of said reference transistor, and e. a second amplifier coupled selectively coupled to at least one input voltage source, a second gain setting resistor, and said comparator circuit, said second amplifier generating a second reference current that is supplied to said comparator circuit wherein said comparator circuit compares said feedback current to said second reference current and the operating current of the DC motor is controlled in response thereto.

Claim 9

A control circuit for a DC motor as claimed in claim 6, wherein said FET reference transistor is sized so that it has a small fraction of the number of cells as said current sink transistor.

Claim 10

A control circuit for a DC motor as claimed in claim 6, wherein said FET reference transistor has 1/1000 the cell size as said current sink transistor.

Claim 11

A control circuit for a DC motor as claimed in claim 6, wherein said transconducting comparator circuit includes a noise lockout latch.

Claim 12

A control circuit for a DC motor as claimed in claim 9, further comprising a filter circuit coupled between said second input to said first amplifier and said phase driver circuits.

Claim 15

A method of controlling a DC motor as claimed in claim 11, wherein said step of controlling the operating current level of said DC motor comprises reducing said secondary reference current by a predetermined percentage when said feedback current exceeds said secondary reference current and returning said secondary reference current to normal when said reference current decreases to said secondary reference current.