Clock synchronized digital TV motion detector

Claim 1

In a TV motion detector circuit of the type which includes an edge detector circuit receiving and processing a TV video signal, with an edge detector circuit output connected to and feeding an output signal to a digital edge memory which stores the edge detectcr circuit output signal for a selected number of TV sweep cycles before producing an output signal representing the edge detector circuit output signal on digital edge memory output, with the digital edge memory connected to and driven by an address counter, and with the address counter connected to and driven by a clock signal source, the improvement comprising: an EXCLUSIVE OR circuit with two inputs and an output, with a first input interconnected with the output of the edge detector circuit and the second input interconnected with the output of the digital edge memory; a shift register with a signal input, a clock input, and at least two outputs, the clock input interconnected with the clock signal source, and the signal input interconnected with the output of the EXCLUSIVE OR circuit; and a multiple input circuit which produces an alarm output signal when all its inputs have the same input signal, with each of its inputs interconnected with an output of the shift register.