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US5006841A Expired / Lapsed US ⏱️ 0.0 years remaining

Addressable transducer with improved response signal processing

Assignee: Sparton Corp
•
Filing: 1988-02-16
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Granted: 1991-04-09
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Expires: 2008-02-16
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Abstract

Abstract A plurality of addressable transducers at remote locations are connected to a home station by a pair of transmission lines which carry power as well as address signals to the transducers, and carry response signals from the transducers, when addressed, to the home station. Each transducer carries a decoder which is programmed to recognize a particular code, and a response circuit comprising a current sink oscillator to modulate the transmission line current at a frequency corresponding to the measured parameter. The response circuit operates on an analog voltage representing the measured condition by an A/D converter to generate a corresponding digital number, a clock provides a fixed frequency, and a divider divides the fixed frequency by the digital number to provide a resultant frequency, which in turn is divided by a flip-flop to yield a square wave output.

Inventors

  • 👤 Arthur D. Vines
  • 👤 Frederick A. Schonfeld
  • 👤 Ricardo Espat

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 03:40
CPC Classifications
H; H04; H04Q; H04Q9/00; G; G08; G08C; G08C19/00; G08C19/16; G08C19/26

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 88 words
In an addressable transducer, a response circuit for generating a signal corresponding to a measurand, comprising: sensing means for producing an analog voltage representing the measurand, an analog to digital converter responsive to the analog voltage for generating a digital number having a value representing the measurand clock means for providing a fixed frequency, and a divider coupled with the clock means and responsive to the digital number for dividing the fixed frequency by the number to yield a resultant frequency corresponding to the value of the measurand.
Claim 2
Dependent Claim 88 words
In an addressable transducer, a response circuit for generating a signal corresponding to a measurand, comprising: sensing means for producing an analog voltage representing the measurand, an analog to digital converter responsive to the analog voltage for generating a digital number having a value representing the measurand clock means for providing a fixed frequency, and a divider coupled with the clock means and responsive to the digital number for dividing the fixed frequency by the number to yield a resultant frequency corresponding to the value of the measurand.
Claim 3
Dependent Claim 33 words
The invention as defined in claim 1 including a flip-flop circuit coupled to the divider output to further divide the resultant frequency and produce a square wave output accurately reflecting the measurand value.
Claim 4
Dependent Claim 42 words
The invention as defined in claim 1 including; a pair of input terminals adapted for coupling with a source of supply current and address signals, and means for coupling the divider to the terminals to modulate the current drawn by the transducer.
Claim 5
Dependent Claim 47 words
The invention as defined in claim 3 wherein the coupling means includes a flip-flop circuit coupled to the input terminals as a current sink and responsive to the resultant frequency of the divider for producing a square wave output having a frequency accurately reflecting the measurand value.

References Cited (Backward Citations)

US3932704A Cited
US3982199A Cited
US4160121A Cited
US4238783A Cited
US4349821A Cited
US4399440A Cited
US4428073A Cited
US4628315A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-04-08 1994-10-08 1995-04-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-04-08 1998-10-08 1999-04-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-04-08 2002-10-08 2003-04-09 $7700.00 Window Closed / Lapsed

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