US5003203A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Adaptive reference voltage generation circuit for PLA sense amplifiers
Assignee: Advanced Micro Devices Inc
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Filing: 1989-06-12
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Granted: 1991-03-26
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Expires: 2009-06-12
Abstract
Abstract An adaptive reference voltage generation circuit. The invention generates a reference voltage for a sense amplifier to provide bias voltages for cells in a PAL type programmable logic array. The circuit of the invention includes a reference cell having characteristics substantially similar to the cells of the array. A reference voltage supply circuit is included for providing a reference voltage in response to any changes in the characteristics of the reference cell. In accordance with the method of the invention, the reference cell is programmed and erased whenever the cells in the array are programmed and erased. Thus the characteristics of the reference cell change in accordance with changes in the characteristics of the cells of the array. As the reference voltage of the circuit of the present invention changes inversely with changes in the characteristics of the reference cell, the circuit of the invention effectively compensates for changes in the characteristics of the cells in the array due to program and erase cycling thereof.
Inventors
- 👤 Vincent K. Z. Win
- 👤 Andrew K. Chan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 23:53
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/26; G11C16/28; G11C7/00; G11C7/14; H; H03; H03K; H03K19/00; H03K19/003; H03K19/00369; H03K19/00384; H03K19/02; H03K19/173; H03K19/177; H03K19/17704; H03K19/17708; H03K19/17712
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
79 words
An adaptive reference voltage generation circuit for generating a reference voltage for a sense amplifier to provide a bias voltage for a cell in a programmable array logic array of cells, said reference voltage generation circuit including: a reference cell having characteristics substantially similar to the characteristics of said cell of said array and reference voltage supply means for providing a reference voltage to said sense amplifier based on response to any change the characteristics of said reference cell.
Claim 2
Dependent Claim
79 words
An adaptive reference voltage generation circuit for generating a reference voltage for a sense amplifier to provide a bias voltage for a cell in a programmable array logic array of cells, said reference voltage generation circuit including: a reference cell having characteristics substantially similar to the characteristics of said cell of said array and reference voltage supply means for providing a reference voltage to said sense amplifier based on response to any change the characteristics of said reference cell.
Claim 3
Dependent Claim
24 words
The invention of claim 1 wherein said reference cell includes a first field effect transistor having an input terminal and first and second terminals.
Claim 4
Dependent Claim
40 words
The invention of claim 2 wherein said reference voltage supply means includes an inverter with an input terminal connected to the first terminal of said transistor and an output terminal providing the output terminal of said reference voltage generation circuit.
Claim 5
Dependent Claim
19 words
The invention of claim 3 including means for feeding the output of said inverter back to the input thereof.
Claim 6
Dependent Claim
44 words
The invention of claim 4 wherein feedback means includes a second field effect transistor having an input terminal connected to output of said inverter, a first terminal connected to input of said inverter and a second terminal connected to a source of supply voltage.
Claim 7
Dependent Claim
18 words
The invention of claim 5 including isolation means for isolating said inverter during a programming mode of operation.
Claim 8
Dependent Claim
27 words
The invention of claim 6 wherein said isolation means includes first means for connecting the second terminal of said reference cell to a source of supply .
Claim 9
Dependent Claim
27 words
The invention of claim 7 wherein said isolation means includes means for disconnecting the first terminal of said reference cell from the input terminal of said inverter.
Claim 10
Dependent Claim
29 words
The invention of claim 8 wherein said sense amplifier includes a pullup transistor and the output of said inverter is connected to an input terminal of said pullup transistor.
Claim 11
Independent Claim
131 words
A method for biasing the cells of a programmable logic array including the steps of: (a) providing an adaptive reference voltage generation circuit including a reference cell having characteristics substantially similar to the cells of said array and reference voltage supply means for providing a reference voltage in response to any change in the characteristics of said reference cell; (b) programming the reference cell before programming the cells of the array and/or (c) erasing the reference cell before erasing the cells of the array, whereby the reference voltage output by the voltage reference circuit changes inversely with changes in the characteristics of the reference cell such that the reference voltage circuit effectively compensates for changes in the characteristics of the cells in the array due to program and erase cycling thereof.
Claim 12
Independent Claim
131 words
A method for biasing the cells of a programmable logic array including the steps of: (a) providing an adaptive reference voltage generation circuit including a reference cell having characteristics substantially similar to the cells of said array and reference voltage supply means for providing a reference voltage in response to any change in the characteristics of said reference cell; (b) programming the reference cell before programming the cells of the array and/or (c) erasing the reference cell before erasing the cells of the array, whereby the reference voltage output by the voltage reference circuit changes inversely with changes in the characteristics of the reference cell such that the reference voltage circuit effectively compensates for changes in the characteristics of the cells in the array due to program and erase cycling thereof.
Claim 13
Dependent Claim
93 words
An adaptive reference voltage generation circuit for generating a reference voltage for a sense amplifier to provide a bias voltage for a cell in a programmable array logic array of cells, said reference voltage generation circuit including: a reference cell having characteristics substantially similar to the characteristics of said cell of said array and coupled to be programmed or erased whenever said cell of said array is programmed or erased, respectively, and reference voltage supply means for providing a reference voltage to said sense amplifier based on the characteristics of said reference cell.
Claim 14
Dependent Claim
93 words
An adaptive reference voltage generation circuit for generating a reference voltage for a sense amplifier to provide a bias voltage for a cell in a programmable array logic array of cells, said reference voltage generation circuit including: a reference cell having characteristics substantially similar to the characteristics of said cell of said array and coupled to be programmed or erased whenever said cell of said array is programmed or erased, respectively, and reference voltage supply means for providing a reference voltage to said sense amplifier based on the characteristics of said reference cell.
Claim 15
Dependent Claim
172 words
An adaptive reference voltage generation circuit for generating a reference voltage for a sense amplifier to provide a bias voltage for a cell in a programmable array logic array of cells, said reference voltage generation circuit including: a reference cell having characteristics substantially similar to the characteristics of said cell of said array, said cell including a first field effect transistor having an input terminal and first and second terminals; first means for connecting said second terminal to a source of a first potential during a first mode of operation; second means for connecting said second terminal to a source of a second potential during a second mode of operation; and reference voltage supply means for providing a reference voltage to said sense amplifier based on the characteristics of said reference cell during said second mode of operation, said reference voltage supply means including an inverter with an input terminal connected to the first terminal of said transistor and an output terminal providing the output terminal of said reference voltage generation circuit.
Claim 16
Dependent Claim
172 words
An adaptive reference voltage generation circuit for generating a reference voltage for a sense amplifier to provide a bias voltage for a cell in a programmable array logic array of cells, said reference voltage generation circuit including: a reference cell having characteristics substantially similar to the characteristics of said cell of said array, said cell including a first field effect transistor having an input terminal and first and second terminals; first means for connecting said second terminal to a source of a first potential during a first mode of operation; second means for connecting said second terminal to a source of a second potential during a second mode of operation; and reference voltage supply means for providing a reference voltage to said sense amplifier based on the characteristics of said reference cell during said second mode of operation, said reference voltage supply means including an inverter with an input terminal connected to the first terminal of said transistor and an output terminal providing the output terminal of said reference voltage generation circuit.
Claim 17
Dependent Claim
24 words
The invention of claim 7 wherein said isolation means includes second means for connecting the second terminal of said reference cell to ground potential.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-03-25 | 1994-09-24 | 1995-03-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-03-25 | 1998-09-24 | 1999-03-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-03-25 | 2002-09-24 | 2003-03-26 | $7700.00 | Window Closed / Lapsed |