US4998075A — Programmable multiple oscillator circuit

Claim 1

Independent Claim 121 words

A programmable source of a plurality of strings of clock signals comprising: an oscillator and an oscillator memory corresponding to each string of clock signals, each oscillator forming the corresponding string of clock signals with a frequency in accordance with the storage content of the corresponding oscillator memory; a program memory for simultaneously storing, for each string of clock signals, at least one indication, of a desired frequency of the corresponding string of clock signals; a source of reference timing signals; and a controller for scanning each oscillator memory and, for each oscillator memory scanned, adjusting the memory content thereof in accordance with the corresponding indication of a desired frequency, the corresponding string of clock signals and the reference timing signal.

Claim 2

Dependent Claim 121 words

A programmable source of a plurality of strings of clock signals comprising: an oscillator and an oscillator memory corresponding to each string of clock signals, each oscillator forming the corresponding string of clock signals with a frequency in accordance with the storage content of the corresponding oscillator memory; a program memory for simultaneously storing, for each string of clock signals, at least one indication, of a desired frequency of the corresponding string of clock signals; a source of reference timing signals; and a controller for scanning each oscillator memory and, for each oscillator memory scanned, adjusting the memory content thereof in accordance with the corresponding indication of a desired frequency, the corresponding string of clock signals and the reference timing signal.

Claim 3

Dependent Claim 39 words

A source of clock signals according to claim 1 wherein the controller comprises means for adjusting the storage content of said oscillator memories and a switching circuit for coupling the means for adjusting to each of the oscillator memories.

Claim 4

Dependent Claim 32 words

A source of clock signals according to claim 1 wherein the controller comprises a comparator for comparing the frequency of any of said strings of clock signals with the reference timing signals.

Claim 5

Dependent Claim 67 words

A source of clock signals according to claim 1 wherein the controller comprises a comparator for comparing, for each of the oscillators, the frequency of the clock signals therefrom with a frequency of the reference signal and means for adjusting the memory content of the oscillator memory, corresponding to each such oscillator, in accordance with the result of such comparison and the corresponding at least one indication.

Claim 6

Dependent Claim 63 words

A source of clock signals according to claim 1 comprising a comparator for comparing the number of clock signals from each oscillator occurring during a time period with the reference signals and means for adjusting the memory content of the oscillator memory, corresponding to such oscillator, in accordance with the result of said comparison and the at least one indication for such oscillator.

Claim 7

Dependent Claim 24 words

A source of clock signals according to claim 5 wherein the comparator comprises a counter for counting the clock signals from the corresponding oscillator.

Claim 8

Dependent Claim 24 words

A source of clock signals according to claim 1 comprising, for each oscillator, a sample and hold circuit which comprises the corresponding oscillator memory.

Claim 9

Dependent Claim 19 words

A source of clock signals according to claim 1 wherein each said oscillator memory comprise a capacitor memory circuit.

Claim 10

Dependent Claim 23 words

A source of clock signals according to claim 8 wherein the controller comprises a source of charging signals for the capacitor memory circuits.

Claim 11

Dependent Claim 30 words

A source of clock signals according to claim 8 comprising a switching circuit for sequentially coupling the source of charging signals to the capacitor memory circuits of the oscillator memories.

Claim 12

Dependent Claim 27 words

A source of clock signals according to claim 10 wherein the source of charging signals comprises means for either selectively charging or discharging the capacitor memory circuits.

Claim 13

Dependent Claim 24 words

A source of clock signals according to claim 8 comprising an amplifier for each capacitor memory for buffering the output of such capacitor memory.

Claim 14

Dependent Claim 31 words

A source of clock signals according to claim 1 wherein each said oscillator comprises a voltage controlled oscillator, the frequency of which is adjusted in accordance with the corresponding oscillator memory.

Claim 15

Dependent Claim 76 words

A source of clock signals according to claim 9 wherein the controller comprises a counter for counting the clock signals from any of the oscillators, means for adjusting said counter in accordance with the indications of a desired frequency for such oscillator, means for controlling a period of time during which the counter counts in accordance with said reference signals, means responsive to the counter for controlling the charging and discharging by the capacitor charging circuit.

Claim 16

Dependent Claim 27 words

The source of clock signals according to claim 2 wherein the oscillators, the switching circuits and the controller are all formed in a common integrated circuit chip.

Claim 17

Dependent Claim 22 words

The source of clock signals according to claim 15 wherein the oscillator memory is also formed in the common integrated circuit chip.

Claim 18

Dependent Claim 33 words

A source of clock signals according to claim 1 comprising a further memory containing initial indications of desired frequencies, the controller being operative for selectively loading the initial indications into the program memory

Claim 19

Dependent Claim 44 words

A source of clock signals according to claim 17 wherein the further memory comprises a stored indication of a desired frequency for each of a plurality of said oscillators and the controller selectively loads the indications into a corresponding location in said program memory.

Claim 20

Dependent Claim 20 words

A source of clock signals according to claim 1 comprising a frequency divider coupled to the output of each oscillator.

Claim 21

Dependent Claim 18 words

A source of clock signals according to claim 19 comprising a signal selector coupled to the frequency divider.

Claim 22

Dependent Claim 39 words

A source of clock signals according to claim 8 wherein the capacitor memories each comprise at least one capacitor, an amplifier coupled for amplifying the signal across the at least one capacitor for increasing the apparent effective capacitance thereof.

Claim 23

Dependent Claim 27 words

A source of clock signals according to claim 1 wherein the controller comprises coarse and fine tune adjustment means for the memory content of the oscillator memories.

Claim 24

Dependent Claim 91 words

A source of clock signals according to claim 1 wherein the controller comprises coarse tune adjustment means for making a coarse adjustment in the memory content of an oscillator memory in accordance with a coarse tune signal derived at least in part from one of the indications of a desired frequency, and fine tune adjustment means for making further fine tune adjustment in the memory content of the same oscillator memory in accordance with a coarse tune signal derived at least in part from the same indication of a desired frequency.

Claim 25

Dependent Claim 68 words

A source of clock signals according to claim 23 comprising means enabling the coarse tune adjustment means to adjust the memory content of one of the oscillator memories until the frequency of the string of clock signals from the corresponding oscillator is within a predetermined deviation from the desired frequency and then enabling the fine tun adjustment means to adjust the memory content of the same oscillator memory.

Claim 26

Dependent Claim 150 words

A plurality of programmable oscillators each for providing a source of a plurality of strings of clock signals, each programmable oscillator comprising an oscillator and an oscillator memory corresponding to each string of clock signals, each oscillator forming the corresponding string of clock signals with a frequency in accordance with the storage content of the corresponding oscillator memory; a program memory for simultaneously storing, for each string of clock signals, at least one indication of a desired frequency of the corresponding string of clock signals; a source of reference timing signals; a controller for sequentially scanning the oscillator memories and, for each oscillator memory scanned, adjusting the memory content thereof in accordance with the corresponding indication of a desired frequency, the corresponding string of clock signals and the reference timing signal; and a port for transferring the indications of the desired frequencies to the program memory from an external device.

Claim 27

Dependent Claim 150 words

A plurality of programmable oscillators each for providing a source of a plurality of strings of clock signals, each programmable oscillator comprising an oscillator and an oscillator memory corresponding to each string of clock signals, each oscillator forming the corresponding string of clock signals with a frequency in accordance with the storage content of the corresponding oscillator memory; a program memory for simultaneously storing, for each string of clock signals, at least one indication of a desired frequency of the corresponding string of clock signals; a source of reference timing signals; a controller for sequentially scanning the oscillator memories and, for each oscillator memory scanned, adjusting the memory content thereof in accordance with the corresponding indication of a desired frequency, the corresponding string of clock signals and the reference timing signal; and a port for transferring the indications of the desired frequencies to the program memory from an external device.

Claim 28

Dependent Claim 16 words

The plurality of programmable oscillators according to claim 25 wherein the ports are serially connected together.

Claim 29

Dependent Claim 45 words

The plurality of programmable oscillators according to claim 26 comprising means for loading the indications for each of the program memories through the corresponding ports and means for providing a confirmation of the frequency indications stored in the program memory back through the corresponding port.

Claim 30

Dependent Claim 25 words

The plurality of programmable oscillators according to claim 26 wherein each port has an output port for providing status information from the corresponding programmable oscillator.

Claim 31

Independent Claim 104 words

A method for controlling a programmable source of a plurality of string of clock signals, the steps comprising storing a program comprising a plurality of different indications of desired frequencies, each said indication corresponding to one of said strings of clock signals; operating the frequency of each of a plurality of oscillators in accordance with the memory content of a separate memory for each such oscillator, each such oscillator thereby forming a different one of said strings; and adjusting the memory content of the memory for an oscillator in accordance with the corresponding string, the corresponding indication of a desired frequency and reference signals.

Claim 32

Independent Claim 104 words

A method for controlling a programmable source of a plurality of string of clock signals, the steps comprising storing a program comprising a plurality of different indications of desired frequencies, each said indication corresponding to one of said strings of clock signals; operating the frequency of each of a plurality of oscillators in accordance with the memory content of a separate memory for each such oscillator, each such oscillator thereby forming a different one of said strings; and adjusting the memory content of the memory for an oscillator in accordance with the corresponding string, the corresponding indication of a desired frequency and reference signals.

Claim 33

Dependent Claim 29 words

The method of claim 29 comprising the step of scanning the oscillators in a sequence and adjusting the memory content of the memory corresponding to the oscillator being scanned.

Claim 34

Dependent Claim 70 words

The method of claim 30 wherein the step of adjusting comprises a coarse tune cycle for using the frequency indicated by a coarse frequency indication for making a coarse adjustment in memory content of the memory for the corresponding oscillator, and a fine tune cycle for using the frequency indicated by a fine frequency indication and making an adjustment in the memory content of the memory for the corresponding oscillator.

Claim 35

Dependent Claim 42 words

The method of claim 31 comprising the step of changing from a coarse to a fine tune cycle for the memory of an oscillator when the frequency is within a predetermined value of the frequency indicated by the coarse tune cycle indication.

Claim 36

Dependent Claim 140 words

A clock pulse generator for generating a plurality of pulse strings, the frequency of the pulses in each pulse string being individually controllable, the generator comprising: a controllable pulse string source, corresponding to each such pulse string, for providing the corresponding pulse string; a memory corresponding to each pulse string source, each pulse string having a frequency corresponding to a storage content in the corresponding memory; a source of reference signals; and a frequency controller responsive to a separate indication of a desired frequency for each of said pulse strings, an indication of the actual frequency of each of said pulse strings and the reference signals for establishing the storage content in each said memory, each said memory thereby causing the corresponding source to adjust the series of regular recurring pulses towards the desired frequency in the corresponding pulse string.

Claim 37

Dependent Claim 140 words

A clock pulse generator for generating a plurality of pulse strings, the frequency of the pulses in each pulse string being individually controllable, the generator comprising: a controllable pulse string source, corresponding to each such pulse string, for providing the corresponding pulse string; a memory corresponding to each pulse string source, each pulse string having a frequency corresponding to a storage content in the corresponding memory; a source of reference signals; and a frequency controller responsive to a separate indication of a desired frequency for each of said pulse strings, an indication of the actual frequency of each of said pulse strings and the reference signals for establishing the storage content in each said memory, each said memory thereby causing the corresponding source to adjust the series of regular recurring pulses towards the desired frequency in the corresponding pulse string.

Claim 38

Dependent Claim 21 words

The pulse generator of claim 33 comprising a register for each said pulse string for storing the corresponding desired frequency indication.

Claim 39

Dependent Claim 40 words

The generator of claim 34 wherein the registers comprises at least one random access memory and the generator further comprises a read only memory connected to the random access memory for supplying the frequency indications to the random access memory.

Claim 40

Dependent Claim 21 words

The pulse generator of claim 35 wherein the read only memory comprises a plurality of indications for each random access memory.

Claim 41

Dependent Claim 28 words

The pulse generator of claim 34 wherein the controller comprises a comparator for comparing the frequency of the pulses in each said pulse string with the reference signal.

Claim 42

Dependent Claim 21 words

The pulse generator of claim 37 wherein the comparator comprises a counter for counting the pulses in each said pulse string.

Claim 43

Dependent Claim 25 words

The pulse generator of claim 38 wherein the controller sets the counter, before counting, in accordance with the desired frequency indication for each pulse string.

Claim 44

Dependent Claim 23 words

The pulse generator of claim 33 wherein the controller comprises means for sequentially and repeatedly adjusting the storage content of each said memory.

Claim 45

Dependent Claim 13 words

The pulse generator of claim 33 wherein the controller comprises a programmable controller.

Claim 46

Dependent Claim 23 words

The pulse generator of claim 33 comprising a sample and hold circuit for each said pulse string source which comprises each said memory.

Claim 47

Dependent Claim 16 words

The pulse generator of claim 33 wherein each said source comprises a controlled variable frequency oscillator.

Claim 48

Dependent Claim 13 words

The pulse generator of claim 33 wherein the memory comprises an analog memory.

Claim 49

Dependent Claim 95 words

A clock pulse generator comprising: a plurality of oscillators each for producing a serial string of electrical pulses at its respective output, means for providing a signal, for each oscillator indicative of a desired frequency; a memory corresponding to each oscillator for controlling the frequency of the oscillator; a comparator for comparing the number of pulses produced by each one of the oscillators with a frequency reference; and means for changing the memory content of each memory in accordance with the result of the comparison and one of the signals indicative of a desired frequency.

Claim 50

Dependent Claim 95 words

A clock pulse generator comprising: a plurality of oscillators each for producing a serial string of electrical pulses at its respective output, means for providing a signal, for each oscillator indicative of a desired frequency; a memory corresponding to each oscillator for controlling the frequency of the oscillator; a comparator for comparing the number of pulses produced by each one of the oscillators with a frequency reference; and means for changing the memory content of each memory in accordance with the result of the comparison and one of the signals indicative of a desired frequency.

Claim 51

Dependent Claim 56 words

The generator of claim 45 comprising a counter, a time base gate responsive to such frequency reference for measuring a selected time interval, the gate opening to allow pulses from one of the oscillators to be counted by the counter, and then closing to prevent the counting of oscillator pulses after the time interval has elapsed.

Claim 52

Dependent Claim 12 words

The generator of claim 46 wherein the frequency reference comprises an oscillator.

Claim 53

Dependent Claim 13 words

The generator of claim 47 wherein the reference comprises a quartz crystal oscillator.

Claim 54

Dependent Claim 20 words

The generator of claim 45 wherein the recited elements of the generator are formed in a single integrated circuit chip.

Claim 55

Dependent Claim 26 words

The generator of claim 45 wherein the stored number is a function of the a residual count of the number of pulses desired to be produced.

Claim 56

Dependent Claim 22 words

The generator of claim 45 comprising, for each said pulse string, a sample and hold capacitor circuit which comprises the corresponding memory.

Claim 57

Dependent Claim 54 words

The generator of claim 51 wherein the sample and hold circuit comprises a capacitor, wherein each oscillator comprises a voltage controlled oscillator and an amplifier for controlling the voltage controlled oscillator, the amplifier having an input coupled to the capacitor of the corresponding memory, a semiconductor gate for regulating the charge on the capacitor.

Claim 58

Dependent Claim 44 words

The generator of claim 52 comprising a switch for each memory for coupling the source to the capacitors of such memory, and at least one resistance for coupling each amplifier output back to precharge any parasitic capacitance of the switch for the corresponding memory.

Claim 59

Dependent Claim 19 words

The generator of claim 53 wherein the gate, capacitor, and amplifier are all formed on a common semiconductor substrate.

Claim 60

Dependent Claim 48 words

The generator of claim 51 wherein each of the oscillators comprise a voltage controlled oscillator and an amplifier for controlling the voltage controlled oscillator, an input of the oscillator being coupled to the capacitor; and a field effect transistor switch pair for regulating the charge on the capacitor.

Claim 61

Dependent Claim 20 words

The generator of claim 55 wherein each of the switch pairs and capacitor are formed on a common semiconductor substrate.

Claim 62

Dependent Claim 32 words

The generator of claim 51 wherein each of the oscillators comprises a voltage controlled oscillator and an amplifier for controlling the oscillator, an input of the amplifier being coupled to the capacitor.

Claim 63

Dependent Claim 44 words

The generator of claim 57 wherein the gate, capacitor and amplifiers are all formed on a common semiconductor substrate through a common doped well; and an output of the amplifier is connected to a common doped well to bias the well against capacitor leakage.

Claim 64

Dependent Claim 18 words

The generator of claim 45 comprising a state machine for providing the signals indicative of a desired frequency.

Claim 65

Dependent Claim 22 words

The generator of claim 57 comprising a programmably settable register for each oscillator for storing each signal indicative of a desired frequency.

Claim 66

Dependent Claim 35 words

The generator of claim 51 wherein each sample and hold circuit each comprises a capacitor and a gate and further comprising a current source, the gate coupling between the current source and the corresponding capacitor.

Claim 67

Dependent Claim 42 words

The generator of claim 45 comprising a divider string with a series of tap points and an output selector for selecting a tap point on the string, and thereby effectively selecting a stream of pulses lower in frequency than the oscillator output.

Claim 68

Dependent Claim 14 words

The generator of claim 62 wherein the divider string comprises a sequence of flip-flops.

Claim 69

Dependent Claim 102 words

A stable integrated sample and hold circuit on a semiconductor substrate comprising an operational amplifier having an input and an output; a capacitor, one plate of which is in communication with the amplifier input and the other plate of which is in communication with the semiconductor substrate; a current source for supplying current to charge the capacitor; at least two switches connected between a current regulator and the current source for regulating the current supplied by the current source; and a loop back connection between the amplifier output to a location between the two switches for biasing the voltage of the location.

Claim 70

Dependent Claim 102 words

A stable integrated sample and hold circuit on a semiconductor substrate comprising an operational amplifier having an input and an output; a capacitor, one plate of which is in communication with the amplifier input and the other plate of which is in communication with the semiconductor substrate; a current source for supplying current to charge the capacitor; at least two switches connected between a current regulator and the current source for regulating the current supplied by the current source; and a loop back connection between the amplifier output to a location between the two switches for biasing the voltage of the location.

Claim 71

Dependent Claim 29 words

The circuit of claim 64 wherein the capacitor and switches share a common doped well, the circuit further comprising a loopback line connecting the amplifier output to the well.

Claim 72

Dependent Claim 54 words

The circuit of claim 64 wherein one of the switches comprises a field effect transistor pair, the first transistor of the pair being responsive to signals of one polarity for opening its gate and the second transistor of the pair providing a matched charge of opposite polarity to the common connection between the pair.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1994-03-04	1994-09-03	1995-03-05	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1998-03-04	1998-09-03	1999-03-05	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2002-03-04	2002-09-03	2003-03-05	$7700.00	Window Closed / Lapsed

Programmable multiple oscillator circuit

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