Method for manufacturing a control plate for a lithographic device

Claim 1

A method for manufacturing a control plate for a lithographic apparatus, whereby the control plate charged with a plurality of particle probes (14, 14') has a semiconductor substrate (1) having an opening (10) for the passage of the particle probes (14, 14') and has a plurality of deflection elements (9, 9') for individually deflecting the particle probes (14, 14'), comprising the steps of: providing on a front side of the semiconductor substrate (1) a first dielectric layer (2) and providing on a back side of the semiconductor substrate (1) a second dielectric layer (3); depositing a metallic layer (4) on the first dielectric layer (2); structuring the second dielectric layer (3) according to the geometry of the opening (10) to be produced in the semiconductor substrate (1); lithographically transferring the geometry and arrangement of the deflection elements (9, 9') to be produced onto a photoresist layer (8) applied on the metallic layer (4), whereby the thickness of the photoresist layer (8) exceeds the height of the deflection elements (9, 9'); voltaically filling up the depressions generated in the photoresist layer (8) to the desired height of the deflection elements (9, 9'); removing the photoresist layer (8); producing the opening (10) by etching the back side of the semiconductor substrate (1); and removing the metallic layer (4) and the first dielectric layer (2) in the region of the opening (10).

Claim 2

A method for manufacturing a control plate for a lithographic apparatus, whereby the control plate charged with a plurality of particle probes (14, 14') has a semiconductor substrate (1) having an opening (10) for the passage of the particle probes (14, 14') and has a plurality of deflection elements (9, 9') for individually deflecting the particle probes (14, 14'), comprising the steps of: providing on a front side of the semiconductor substrate (1) a first dielectric layer (2) and providing on a back side of the semiconductor substrate (1) a second dielectric layer (3); depositing a metallic layer (4) on the first dielectric layer (2); structuring the second dielectric layer (3) according to the geometry of the opening (10) to be produced in the semiconductor substrate (1); lithographically transferring the geometry and arrangement of the deflection elements (9, 9') to be produced onto a photoresist layer (8) applied on the metallic layer (4), whereby the thickness of the photoresist layer (8) exceeds the height of the deflection elements (9, 9'); voltaically filling up the depressions generated in the photoresist layer (8) to the desired height of the deflection elements (9, 9'); removing the photoresist layer (8); producing the opening (10) by etching the back side of the semiconductor substrate (1); and removing the metallic layer (4) and the first dielectric layer (2) in the region of the opening (10).

Claim 3

A method for manufacturing a control plate for a lithographic device, whereby the control plate charged with a plurality of particle probes (14, 14') has a semiconductor substrate (1) having an opening (10) for the passage of the particle probes (14, 14') and has a plurality of deflection elements (9, 9') for individually deflecting the particles probes (14 14'), comprising the steps of: providing on a front side of the semiconductor substrate (1) a first dielectric layer (2) and providing on a back side of the semiconductor substrate a second dielectric layer (3); depositing a metallic layer (4) on the first dielectric layer (2); structuring the second dielectric layer (3) according to the geometry of the opening (10) to be generated in the semiconductor substrate (1); coating the metallic layer with a first (11) and a second intermediate layer (12), whereby the thickness of the first intermediate layer (11) is dimensioned such that it exceeds the height of the deflection elements (9, 9') to be formed; lithographically transferring the geometry and arrangement of the deflection elements (9, 9') to be generated onto a photoresist layer (5) applied on the second intermediate layer (12); transferring the structure of the photoresist layer (5) by an etching of the first and second intermediate layers (11, 12); voltaically filling the depressions generated in the first intermediate layer (11) up to the height of the deflection elements (9, 9'); removing the photoresist layer (5) and the first and second intermediate layers (11, 12); generating the opening (10) by anisotropic etching of the semiconductor substrate at the back side of the semiconductor substrate; and removing the first dielectric layer (2) and the metallic layer (4) in the region of the opening (10).

Claim 4

A method for manufacturing a control plate for a lithographic device, whereby the control plate charged with a plurality of particle probes (14, 14') has a semiconductor substrate (1) having an opening (10) for the passage of the particle probes (14, 14') and has a plurality of deflection elements (9, 9') for individually deflecting the particles probes (14 14'), comprising the steps of: providing on a front side of the semiconductor substrate (1) a first dielectric layer (2) and providing on a back side of the semiconductor substrate a second dielectric layer (3); depositing a metallic layer (4) on the first dielectric layer (2); structuring the second dielectric layer (3) according to the geometry of the opening (10) to be generated in the semiconductor substrate (1); coating the metallic layer with a first (11) and a second intermediate layer (12), whereby the thickness of the first intermediate layer (11) is dimensioned such that it exceeds the height of the deflection elements (9, 9') to be formed; lithographically transferring the geometry and arrangement of the deflection elements (9, 9') to be generated onto a photoresist layer (5) applied on the second intermediate layer (12); transferring the structure of the photoresist layer (5) by an etching of the first and second intermediate layers (11, 12); voltaically filling the depressions generated in the first intermediate layer (11) up to the height of the deflection elements (9, 9'); removing the photoresist layer (5) and the first and second intermediate layers (11, 12); generating the opening (10) by anisotropic etching of the semiconductor substrate at the back side of the semiconductor substrate; and removing the first dielectric layer (2) and the metallic layer (4) in the region of the opening (10).