US4992394A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Self aligned registration marks for integrated circuit fabrication
Assignee: Nokia Bell Labs
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Filing: 1989-07-31
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Granted: 1991-02-12
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Expires: 2009-07-31
Abstract
Abstract In order to reduce alignment errors arising in the fabrication of semiconductor integrated circuits using electron beam lithography, enhanced registration marks--(i.e., registration marks that are more easily and accurately detectable by the electron beam)--are formed at the edges of oxide layers, located at the surface of a silicon body, by means of forming metal silicide layers having edges coincident with the edges of the oxide layers. Advantageously, the enhancing of the registgration marks by forming the metal silicide is performed subsequent to any high temperature processing steps, whereby the integrity of the marks is maintained.
Inventors
- 👤 Robert L. Kostelak, Jr.
- 👤 William T. Lynch
- 👤 Sheila Vaidya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 12:32
CPC Classifications
H; H10; H10W; H10W46/00; H10W46/301; H10W46/501; Y; Y10; Y10S; Y10S438/00; Y10S438/975
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
146 words
A method of fabricating an integrated circuit at a surface of a semiconductor body comprising the steps of (a) forming at the surface a first lithographically patterned layer of first material having a registration feature and a first device feature; (b) enhancing the registration feature but not the device feature, to form an enhanced registration feature, said enhancing step comprising forming a self-aligned layer of second material having at least one edge which is substantially coincident with an edge of the registration feature of the first patterned layer of first material, the second material being different from the semiconductor and the first material; and (c) forming at the surface a second lithographically patterned layer of third material having a second device feature, using the edge of the enhanced registration feature as a fiducial mark for aligning the second device feature with respect to first device feature.
Claim 2
Independent Claim
146 words
A method of fabricating an integrated circuit at a surface of a semiconductor body comprising the steps of (a) forming at the surface a first lithographically patterned layer of first material having a registration feature and a first device feature; (b) enhancing the registration feature but not the device feature, to form an enhanced registration feature, said enhancing step comprising forming a self-aligned layer of second material having at least one edge which is substantially coincident with an edge of the registration feature of the first patterned layer of first material, the second material being different from the semiconductor and the first material; and (c) forming at the surface a second lithographically patterned layer of third material having a second device feature, using the edge of the enhanced registration feature as a fiducial mark for aligning the second device feature with respect to first device feature.
Claim 3
Dependent Claim
31 words
The method of claim 1 in which the step of forming the second lithographically patterned layer includes using a direct writing electron beam to delineate the patterning of the second layer.
Claim 4
Dependent Claim
23 words
The method of claim 1 in which the second material is platinum, cobalt, titanium, tungsten or tantalum or silicide thereof or mixture thereof.
Claim 5
Dependent Claim
19 words
The method of claim 1 in which the second material is a metal or metal silicide or mixture thereof.
Claim 6
Dependent Claim
26 words
The method of claim 1 in which localized impurity-doped device regions located at the surface of the body are formed prior to enhancing the registration feature.
Claim 7
Dependent Claim
32 words
The method of claim 5 in which the body is silicon and in which the first lithographically patterned layer is a buried silicon dioxide layer located at the surface of the body.
Claim 8
Dependent Claim
17 words
The method of claim 1 in which the first layer of first material is an oxide layer.
Claim 9
Dependent Claim
12 words
The method of claim 7 in which the third material is polysilicon.
Claim 10
Dependent Claim
19 words
The method of claim 7 in which the second material is a metal or metal silicide or mixture thereof.
Claim 11
Dependent Claim
23 words
The method of claim 7 in which the second material is platinum, cobalt, titanium, tungsten or tantalum or silicide thereof or mixture thereof.
Claim 12
Dependent Claim
18 words
The method of claim 7 in which the body is silicon and the first material is silicon dioxide.
Claim 13
Dependent Claim
19 words
The method of claim 11 in which the second material is a metal or metal silicide or mixture thereof.
Claim 14
Dependent Claim
23 words
The method of claim 12 in which the second material is platinum, cobalt, titanium, tungsten or tantalum or silicide thereof or mixture thereof.
Claim 15
Dependent Claim
12 words
The method of claim 11 in which the third material is polysilicon.
References Cited (Backward Citations)
US4233091A
Cited
JPS5575229A
Cited
JPS564229A
Cited
JPS5875838A
Cited
JPS5972724A
Cited
JPS61100928A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-02-11 | 1994-08-13 | 1995-02-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-02-11 | 1998-08-13 | 1999-02-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-02-11 | 2002-08-13 | 2003-02-12 | $7700.00 | Window Closed / Lapsed |