US4985743A
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US
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Insulated gate bipolar transistor
Assignee: Denso Corp
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Filing: 1988-07-19
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Granted: 1991-01-15
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Expires: 2008-07-19
Abstract
Abstract This invention is basically related to an insulated gate bipolar transistor comprising a first conductivity type semiconductor substrate, a second conductivity type semiconductor layer formed on the substrate and having a low concentration of impurities, a first conductivity type base layer formed on a surface of the semiconductor layer, a second conductivity type source layer formed on the surface of the base layer and having a channel region at at least one end thereof, a gate electrode, a source electrode and a drain electrode, and is characterized in that a voltage dropping portion is provided either inside the source layer or between the source layer and the source electrode. Accordingly an insulated gate bipolar semiconductor transistor having this configuration can prevent a latch up phenomenon caused by a voltage drop in a source layer.
Inventors
- 👤 Norihito Tokura
- 👤 Hiroyasu Ito
- 👤 Naoto Okabe
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 13:06
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D12/00; H10D12/411; H10D12/441; H10D62/17; H10D62/393; H10D62/80; H10D62/83; H10D64/00; H10D64/60; H10D64/62
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
318 words
An insulated gate bipolar transistor, which comprises: a first conductivity type semiconductor substrate; a second conductivity type semiconductor layer, formed on and above said substrate; a base layer of said first conductivity type formed on at least a surface of said semiconductor layer; a source layer formed on at least a surface of said base layer, whereby a PN junction is formed between said source layer and said base layer, and said source layer is arranged therein in such a manner to form a channel region in said base layer and between said source layer and said semiconductor layer; a gate electrode formed above said channel region; a gate insulating film interposed between said channel region and said gate electrode; a source electrode, electrically coupled to said base layer and to said source layer; wherein, when said channel region is made conductive by applying an electrical voltage to said gate electrode, a first passage is formed in which a first carrier flows from said source electrode to said semiconductor substrate through said source layer, said channel region and said semiconductor layer, and simultaneously, a second passage is formed in which a second carrier flows from said semiconductor substrate to said source electrode through said semiconductor layer and said base layer; and a voltage dropping portion in a predetermined passage for said first carrier between said source electrode and said source layer; wherein said electrode has a portion thereof provided over a predetermined surface portion of said source layer and said voltage dropping portion includes a resistance film provided between said predetermined portion of said source layer and said source electrode, provided directly above the predetermined portion of said source layer in a way to provide a substantially vertical voltage drop to said semiconductor layer and to prevent a combination of said semiconductor substrate, said semiconductor layer, said base layer, and said source layer from acting as a thyristor.
Claim 2
Dependent Claim
318 words
An insulated gate bipolar transistor, which comprises: a first conductivity type semiconductor substrate; a second conductivity type semiconductor layer, formed on and above said substrate; a base layer of said first conductivity type formed on at least a surface of said semiconductor layer; a source layer formed on at least a surface of said base layer, whereby a PN junction is formed between said source layer and said base layer, and said source layer is arranged therein in such a manner to form a channel region in said base layer and between said source layer and said semiconductor layer; a gate electrode formed above said channel region; a gate insulating film interposed between said channel region and said gate electrode; a source electrode, electrically coupled to said base layer and to said source layer; wherein, when said channel region is made conductive by applying an electrical voltage to said gate electrode, a first passage is formed in which a first carrier flows from said source electrode to said semiconductor substrate through said source layer, said channel region and said semiconductor layer, and simultaneously, a second passage is formed in which a second carrier flows from said semiconductor substrate to said source electrode through said semiconductor layer and said base layer; and a voltage dropping portion in a predetermined passage for said first carrier between said source electrode and said source layer; wherein said electrode has a portion thereof provided over a predetermined surface portion of said source layer and said voltage dropping portion includes a resistance film provided between said predetermined portion of said source layer and said source electrode, provided directly above the predetermined portion of said source layer in a way to provide a substantially vertical voltage drop to said semiconductor layer and to prevent a combination of said semiconductor substrate, said semiconductor layer, said base layer, and said source layer from acting as a thyristor.
Claim 3
Dependent Claim
113 words
An insulated gate bipolar transistor according to claim 1, wherein said first conductivity type, of said semiconductor substrate, is P type and said second conductivity type, of said semiconductor layer, is N type, and said voltage dropping portion decreases a voltage, and has an equivalent resistance value R 1 which is determined in accordance with the following equation; (K×R.sub.2 -R.sub.1)≦0 wherein, R 2 denotes an equivalent resistance value in said base layer in said passage for said second carrier and K denotes a value defined by K=I h /I e in which I e denotes an electron current of said first carrier and I h denotes a hole current of said second carrier.
Claim 4
Dependent Claim
43 words
An insulated gate bipolar transistor according to claim 2, wherein said voltage dropping portion has a same conductivity type as that of a remaining portion of said source layer, but a concentration of impurities thereof is lower than that of said remaining portion.
Claim 5
Dependent Claim
247 words
An insulated gate bipolar transistor which comprises: a first conductivity type semiconductor substrate; a second conductivity type semiconductor layer formed on said semiconductor substrate; a base layer of said first conductivity type formed on at least a surface of said semiconductor layer; a source layer formed on at least a surface of said base layer, formed of a material such that a PN junction is formed between said source layer and said base layer, and said source layer is arranged therein in such a manner to form a channel region in said base layer between said source layer and said semiconductor layer; a gate electrode formed on said channel region; a gate insulating film interposed between said channel region and said gate electrode; a source electrode electrically connected to said base layer and to said source layer; wherein, when said channel region is made conductive by applying an electrical voltage to said gate electrode, a first passage is formed in which a first carrier flows from said source electrode to said semiconductor substrate through said source layer, said channel region and said semiconductor layer, and simultaneously, a second passage is formed in which a second carrier flows from said semiconductor substrate to said source electrode through said semiconductor layer and said base layer; and wherein said voltage dropping portion comprises a Zener diode formed between said source layer and a layer formed in said source layer having an opposite conductivity type to that of said source layer.
Claim 6
Dependent Claim
247 words
An insulated gate bipolar transistor which comprises: a first conductivity type semiconductor substrate; a second conductivity type semiconductor layer formed on said semiconductor substrate; a base layer of said first conductivity type formed on at least a surface of said semiconductor layer; a source layer formed on at least a surface of said base layer, formed of a material such that a PN junction is formed between said source layer and said base layer, and said source layer is arranged therein in such a manner to form a channel region in said base layer between said source layer and said semiconductor layer; a gate electrode formed on said channel region; a gate insulating film interposed between said channel region and said gate electrode; a source electrode electrically connected to said base layer and to said source layer; wherein, when said channel region is made conductive by applying an electrical voltage to said gate electrode, a first passage is formed in which a first carrier flows from said source electrode to said semiconductor substrate through said source layer, said channel region and said semiconductor layer, and simultaneously, a second passage is formed in which a second carrier flows from said semiconductor substrate to said source electrode through said semiconductor layer and said base layer; and wherein said voltage dropping portion comprises a Zener diode formed between said source layer and a layer formed in said source layer having an opposite conductivity type to that of said source layer.
Claim 7
Dependent Claim
280 words
An insulated gate bipolar transistor, which comprises: a first conductivity type semiconductor substrate; a second conductivity type semiconductor layer formed on said substrate; a base layer of said first conductivity type formed on at least a surface of said semiconductor layer; a source layer formed on at least a surface of said base layer, formed of a material such that a PN junction is formed between said source layer and said base layer, and said source layer is arranged therein in such a manner to form a channel region in said base layer between said source layer and said semiconductor layer; a gate electrode formed on said channel region and a gate insulating film interposed between said channel region and said gate electrode; a source electrode electrically connected to said base layer and to said source layer; wherein, when said channel region is made conductive by applying an electrical voltage to said gate electrode, a first passage is formed in which a first carrier flows from said source electrode to said semiconductor substrate through said source layer, said channel region and said semiconductor layer, and simultaneously, a second passage is formed in which a second carrier flows from said semiconductor substrate to said source electrode through said semiconductor layer and said base layer; wherein said source layer is a layer having a low concentration of a predetermined impurity and at least a part of which forms a voltage dropping portion to prevent a working of a combination formed by said semiconductor substrate, said semiconductor layer, said base layer and said source layer as a thyristor due to said flow of said first and said second carriers at said PN junction.
Claim 8
Dependent Claim
280 words
An insulated gate bipolar transistor, which comprises: a first conductivity type semiconductor substrate; a second conductivity type semiconductor layer formed on said substrate; a base layer of said first conductivity type formed on at least a surface of said semiconductor layer; a source layer formed on at least a surface of said base layer, formed of a material such that a PN junction is formed between said source layer and said base layer, and said source layer is arranged therein in such a manner to form a channel region in said base layer between said source layer and said semiconductor layer; a gate electrode formed on said channel region and a gate insulating film interposed between said channel region and said gate electrode; a source electrode electrically connected to said base layer and to said source layer; wherein, when said channel region is made conductive by applying an electrical voltage to said gate electrode, a first passage is formed in which a first carrier flows from said source electrode to said semiconductor substrate through said source layer, said channel region and said semiconductor layer, and simultaneously, a second passage is formed in which a second carrier flows from said semiconductor substrate to said source electrode through said semiconductor layer and said base layer; wherein said source layer is a layer having a low concentration of a predetermined impurity and at least a part of which forms a voltage dropping portion to prevent a working of a combination formed by said semiconductor substrate, said semiconductor layer, said base layer and said source layer as a thyristor due to said flow of said first and said second carriers at said PN junction.
Claim 9
Dependent Claim
119 words
An insulated gate bipolar transistor according to claim 5, wherein said first conductivity type of said semiconductor layer is P type and said second conductivity type of said semiconductor layer is N type, and said voltage dropping portion decreases a voltage, utilizing an electric resistance wherein an equivalent resistance value R 1 of said electric resistance is determined in accordance with the following equation; (K×R.sub.2 -R.sub.1)≦0 wherein, R 2 denotes an equivalent resistance value in said base layer in said passage for said second carrier and K denotes a value defined by K=I h /I e in which I e denotes an electron current of said first carrier and I h denotes a hole current of said second carrier.
Claim 10
Dependent Claim
22 words
An insulated gate bipolar transistor according to claim 1, wherein said second conductivity type semiconductor layer has a low concentration of impurities.
Claim 11
Dependent Claim
114 words
An insulated gate bipolar transistor according to claim 1, wherein said voltage dropping portion is provided in a region between said source layer and said source electrode and said second conductivity type source layer is covered with an interlayer insulating film in which said gate electrode is provided at least in a vicinity of said channel region, and said voltage dropping portion is provided at an opening portion of said insulating film and is positioned on said second conductivity type source layer in contact with said source layer, and said source electrode formed as a film that covers all of the surfaces of said base layer, said insulating film and said voltage dropping portion.
Claim 12
Dependent Claim
81 words
An insulated gate bipolar transistor according to claim 8, wherein said voltage dropping portion is provided in the form of a film to cover at least a portion of the surface of said second conductivity type source layer and said interlayer insulating film having said gate electrode positioned at least in a vicinity of said channel region, wherein said source electrode covers at least the surface of said first conductivity type base layer and said film of said voltage dropping portion.
Claim 13
Dependent Claim
89 words
An insulated gate bipolar transistor according to claim 1, wherein said gate insulating film is also extendedly formed over an upper portion of said source layer, and a contacting hole is formed in an upper portion of said source layer including at least a portion of said gate insulating film extendedly formed thereon while said source electrode is formed at least on said gate insulating film extendedly formed on said source layer, said resistance film being provided between said source layer and said source electrode in said contacting hole.
Claim 14
Dependent Claim
27 words
An insulated gate bipolar transistor according to claim 10, wherein said resistance film includes a polycrystalline silicon film formed between said source layer and said source electrode.
Claim 15
Dependent Claim
81 words
An insulated gate bipolar transistor according to claim 11, wherein said resistance film has an equivalent resistance value R 1 which is determined in accordance with the following equation: (K×R.sub.2 -R.sub.1)≦0 wherein, R 2 denotes an equivalent resistance value in said base layer in said passage for said second carrier and K denotes a value defined by K=I 2 /I 1 in which I 1 denotes current of said first carrier and I 2 denotes a current of said second carrier.
Claim 16
Dependent Claim
34 words
A transistor as in claim 1 wherein said voltage dropping portion is disposed in a way such that current between said source electrode and said source layer must pass through said voltage dropping layer.
Claim 17
Dependent Claim
37 words
An insulated gate bipolar transistor according to claim 12, wherein said voltage dropping portion is composed of a P-type layer provided in one end portion of said second conductivity type source layer apart from said gate electrode.
Claim 18
Dependent Claim
27 words
An insulated gate bipolar transistor according to claim 14, wherein said voltage dropping portion is formed by implanting P-type ions into said second conductivity type source layer.
Claim 19
Dependent Claim
39 words
An insulated gate bipolar transistor according to claim 12, wherein said voltage dropping portion is composed of an N-type source layer provided in one end portion of said second conductivity type source layer and adjacent to said gate electrode.
Claim 20
Dependent Claim
34 words
An insulated gate bipolar transistor according to claim 6, wherein said voltage dropping portion is composed of an N-type source layer and is provided in the whole of said second conductivity type source layer.
Claim 21
Dependent Claim
12 words
A transistor as in claim 5, wherein said predetermined impurity is Boron.
References Cited (Backward Citations)
US4406051A
Cited
US4364073A
Cited
DE3114971A1
Cited
JPS57211773A
Cited
US4495513A
Cited
JPS60196974A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-01-14 | 1994-07-16 | 1995-01-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-01-14 | 1998-07-16 | 1999-01-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-01-14 | 2002-07-16 | 2003-01-15 | $7700.00 | Window Closed / Lapsed |