US4983534A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device and method of manufacturing the same
Assignee: NEC Corp
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Filing: 1990-07-20
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Granted: 1991-01-08
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Expires: 2010-07-20
Abstract
Abstract A method of manufacturing a semiconductor device includes forming a base region and a collector region on an Si substrate, forming, on the base region, an emitter region of a semiconductor material having an energy gap larger than that of Si, forming an Si film on the emitter region, ion-implanting an element into a surface portion of the emitter region or at the interface of the emitter region and the Si film and a periphery portion of the interface, and simultaneously forming electrodes on the base and collector regions and on the Si film. A heterojunction bipolar transistor manufactured by the above method is also disclosed.
Inventors
- 👤 Kuniko Kikuta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 19:58
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/021; H10D10/80; H10D10/821; H10D62/00; H10D62/80; H10D62/82; Y; Y10; Y10S; Y10S148/00; Y10S148/01; Y10S148/011; Y10S148/072; Y10S148/084; Y10S438/00; Y10S438/933
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
119 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first part of said semiconductor device on a Si substrate, said first part being made of Si; forming, on said first part, a second part of said semiconductor device of a semiconductor material having an energy gap larger than that of Si; covering said second part with a Si film; ion-implanting an element at the interface of said second part and said Si film and a periphery portion of said interface, said element forming a compound with said semiconductor material, said compound having an energy gap smaller than that of said semiconductor material; and forming electrodes on said first part and on said Si film, respectively.
Claim 2
Independent Claim
119 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first part of said semiconductor device on a Si substrate, said first part being made of Si; forming, on said first part, a second part of said semiconductor device of a semiconductor material having an energy gap larger than that of Si; covering said second part with a Si film; ion-implanting an element at the interface of said second part and said Si film and a periphery portion of said interface, said element forming a compound with said semiconductor material, said compound having an energy gap smaller than that of said semiconductor material; and forming electrodes on said first part and on said Si film, respectively.
Claim 3
Dependent Claim
18 words
A method of manufacturing a semiconductor device as claimed in claim 1, wherein said semiconductor material is GaP.
Claim 4
Dependent Claim
18 words
A method of manufacturing a semiconductor device as claimed in claim 2, wherein said implanted element is As.
Claim 5
Dependent Claim
18 words
A method of manufacturing a semiconductor device as claimed in claim 1, wherein said implanted element is As.
Claim 6
Dependent Claim
28 words
A method of manufacturing a semiconductor device as claimed in claim 1, wherein said implanted element is an element of the same conductivity type as the second part.
Claim 7
Independent Claim
100 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first part of said semiconductor device on a Si substrate, said first part being made of Si; forming, on said first part, a second part of said semiconductor device of a semiconductor material having an energy gap larger than that of Si; covering said second part with a Si film; ion-implanting an element formed of Si at the interface of said second part and said Si film and a periphery portion of said interface; and forming electrodes on said first part and on said Si film, respectively.
Claim 8
Independent Claim
100 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first part of said semiconductor device on a Si substrate, said first part being made of Si; forming, on said first part, a second part of said semiconductor device of a semiconductor material having an energy gap larger than that of Si; covering said second part with a Si film; ion-implanting an element formed of Si at the interface of said second part and said Si film and a periphery portion of said interface; and forming electrodes on said first part and on said Si film, respectively.
Claim 9
Independent Claim
103 words
A method of manufacturing a heterojunction bipolar transistor, comprising the steps of: forming a collector region and a base region on a Si substrate, said base region being made of Si; forming on said base region an emitter region of GaP; forming an Si film of said one conductivity type on said emitter region; forming wiring layers for said emitter region, said base region, and said collector region, the wiring layer for said emitter region being arranged on said Si film; implanting ions of As at the interface of said emitter region and said Si film and the periphery portion of said interface.
Claim 10
Independent Claim
103 words
A method of manufacturing a heterojunction bipolar transistor, comprising the steps of: forming a collector region and a base region on a Si substrate, said base region being made of Si; forming on said base region an emitter region of GaP; forming an Si film of said one conductivity type on said emitter region; forming wiring layers for said emitter region, said base region, and said collector region, the wiring layer for said emitter region being arranged on said Si film; implanting ions of As at the interface of said emitter region and said Si film and the periphery portion of said interface.
Claim 11
Independent Claim
103 words
A method of manufacturing a heterojunction bipolar transistor, comprising the steps of: forming a collector region and a base region on a Si substrate, said base region being made of Si; forming on said base region an emitter region of GaP; forming an Si film of said one conductivity type on said emitter region; forming wiring layers for said emitter region, said base region, and said collector region, the wiring layer for said emitter region being arranged on said Si film; implanting ions of Si at the interface of said emitter region and said Si film and the periphery portion of said interface.
Claim 12
Independent Claim
103 words
A method of manufacturing a heterojunction bipolar transistor, comprising the steps of: forming a collector region and a base region on a Si substrate, said base region being made of Si; forming on said base region an emitter region of GaP; forming an Si film of said one conductivity type on said emitter region; forming wiring layers for said emitter region, said base region, and said collector region, the wiring layer for said emitter region being arranged on said Si film; implanting ions of Si at the interface of said emitter region and said Si film and the periphery portion of said interface.
Claim 13
Independent Claim
109 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first part of said semiconductor device on a Si substrate, said first part being made of Si; forming, on said first part, a second part of said semiconductor device of a semiconductor material having an energy gap larger than that of Si; covering said second part with a Si film; ion-implanting an element into a surface portion of said second part, said element forming a compound with said semiconductor material, said compound having an energy gap smaller than that of said semiconductor material; and forming electrodes on said first part and on said Si film, respectively.
Claim 14
Independent Claim
109 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first part of said semiconductor device on a Si substrate, said first part being made of Si; forming, on said first part, a second part of said semiconductor device of a semiconductor material having an energy gap larger than that of Si; covering said second part with a Si film; ion-implanting an element into a surface portion of said second part, said element forming a compound with said semiconductor material, said compound having an energy gap smaller than that of said semiconductor material; and forming electrodes on said first part and on said Si film, respectively.
Claim 15
Dependent Claim
18 words
A method of manufacturing a semiconductor device as claimed in claim 9, wherein said semiconductor material is GaP.
Claim 16
Dependent Claim
18 words
A method of manufacturing a semiconductor device as claimed in claim 10, wherein said implanted element is As.
Claim 17
Dependent Claim
18 words
A method of manufacturing a semiconductor device as claimed in claim 9, wherein said implanted element is As.
Claim 18
Dependent Claim
28 words
A method of manufacturing a semiconductor device as claimed in claim 9, wherein said implanted element is an element of the same conductivity type as the second part.
Claim 19
Independent Claim
90 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first part of said semiconductor device on a Si substrate, said first part being made of Si; forming, on said first part, a second part of said semiconductor device of a semiconductor material having an energy gap larger than that of Si; covering said second part with a Si film; ion-implanting an element formed of Si into a surface portion of said second part; and forming electrodes on said first part and on said Si film, respectively.
Claim 20
Independent Claim
90 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first part of said semiconductor device on a Si substrate, said first part being made of Si; forming, on said first part, a second part of said semiconductor device of a semiconductor material having an energy gap larger than that of Si; covering said second part with a Si film; ion-implanting an element formed of Si into a surface portion of said second part; and forming electrodes on said first part and on said Si film, respectively.
Claim 21
Independent Claim
92 words
A method of manufacturing a heterojunction bipolar transistor, comprising the steps of: forming a collector region and a base region on a Si substrate, said base region being made of Si; forming on said base region an emitter region of GaP; forming an Si film of said one conductivity type on said emitter region; forming wiring layers for said emitter region, said base region, and said collector region, the wiring layer for said emitter region being arranged on said Si film; implanting ions of As into a surface of said emitter region.
Claim 22
Independent Claim
92 words
A method of manufacturing a heterojunction bipolar transistor, comprising the steps of: forming a collector region and a base region on a Si substrate, said base region being made of Si; forming on said base region an emitter region of GaP; forming an Si film of said one conductivity type on said emitter region; forming wiring layers for said emitter region, said base region, and said collector region, the wiring layer for said emitter region being arranged on said Si film; implanting ions of As into a surface of said emitter region.
Claim 23
Independent Claim
92 words
A method of manufacturing a heterojunction bipolar transistor, comprising the steps of: forming a collector region and a base region on a Si substrate, said base region being made of Si; forming on said base region an emitter region of GaP; forming an Si film of said one conductivity type on said emitter region; forming wiring layers for said emitter region, said base region, and said collector region, the wiring layer for said emitter region being arranged on said Si film; implanting ions of Si into a surface of said emitter region.
Claim 24
Independent Claim
92 words
A method of manufacturing a heterojunction bipolar transistor, comprising the steps of: forming a collector region and a base region on a Si substrate, said base region being made of Si; forming on said base region an emitter region of GaP; forming an Si film of said one conductivity type on said emitter region; forming wiring layers for said emitter region, said base region, and said collector region, the wiring layer for said emitter region being arranged on said Si film; implanting ions of Si into a surface of said emitter region.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-01-07 | 1994-07-09 | 1995-01-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-01-07 | 1998-07-09 | 1999-01-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-01-07 | 2002-07-09 | 2003-01-08 | $7700.00 | Window Closed / Lapsed |