US4980310A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making a trench dram cell
Assignee: Mitsubishi Electric Corp
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Filing: 1989-09-26
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Granted: 1990-12-25
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Expires: 2009-09-26
Abstract
Abstract A dynamic semiconductor memory device comprising a substrate having one trench including two capacitors for memory cell capacitances of two bits, and two elements such as transistors for reading, writing, and storing information represented by charge, arranged symmetrically at the central portion of the trench so as to correspond to the memory cells for two bits, and a field oxide film formed at the center of the trench on the bottom and on the side walls for separating the capacitors and elements.
Inventors
- 👤 Yoshio Matsuda
- 👤 Kazuyasu Fujishima
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 07:58
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/37; Y; Y10; Y10S; Y10S257/00; Y10S257/911
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
269 words
A method for manufacturing a semiconductor memory device comprising the steps of: preparing a semiconductor substrate of a predetermined impurity concentration of a certain conductivity type and having a main surface; forming on said semiconductor substrate a trench to be used to provide a surface for forming a capacitor thereon for storing information represented by electric charge; forming a thick insulating portion for separation extending longitudinally only in the central portion of the bottom surface of said trench, whereby said trench is separated into one lateral half and another lateral half; forming a first impurity doped region of the opposite conductivity type in the side wall along the entire height thereof and the bottom surface of one lateral half of said trench; forming a second impurity doped region of the opposite conductivity type in the side wall along the entire height thereof and the bottom surface of the other lateral half of said trench; forming an insulating layer on the side walls and the bottom surface of said trench and on said first and second impurity doped regions and extending out of said trench onto adjacent surface portions of said semiconductor substrate, wherein said insulating layer is connected to said insulating portion and wherein said first and second impurity doped regions are separated from each other by said insulating portion; and forming a U-shaped conductive layer on said insulating layer on said side walls and across the bottom surface of said trench and oriented to be shared by said first and second impurity doped regions adjacent the sides, said thick insulating portion forming separate capacitors for storing electric charges.
Claim 2
Independent Claim
269 words
A method for manufacturing a semiconductor memory device comprising the steps of: preparing a semiconductor substrate of a predetermined impurity concentration of a certain conductivity type and having a main surface; forming on said semiconductor substrate a trench to be used to provide a surface for forming a capacitor thereon for storing information represented by electric charge; forming a thick insulating portion for separation extending longitudinally only in the central portion of the bottom surface of said trench, whereby said trench is separated into one lateral half and another lateral half; forming a first impurity doped region of the opposite conductivity type in the side wall along the entire height thereof and the bottom surface of one lateral half of said trench; forming a second impurity doped region of the opposite conductivity type in the side wall along the entire height thereof and the bottom surface of the other lateral half of said trench; forming an insulating layer on the side walls and the bottom surface of said trench and on said first and second impurity doped regions and extending out of said trench onto adjacent surface portions of said semiconductor substrate, wherein said insulating layer is connected to said insulating portion and wherein said first and second impurity doped regions are separated from each other by said insulating portion; and forming a U-shaped conductive layer on said insulating layer on said side walls and across the bottom surface of said trench and oriented to be shared by said first and second impurity doped regions adjacent the sides, said thick insulating portion forming separate capacitors for storing electric charges.
Claim 3
Dependent Claim
40 words
A method for manufacturing a semiconductor memory device according to claim 1, further comprising the step of forming semiconductor elements respectively adjacent the ends of said first and second impurity doped regions on the main surface of said semiconductor substrate.
Claim 4
Dependent Claim
22 words
A method for manufacturing a semiconductor memory device according to claim 1, further comprising the step of forming a field effect device.
Claim 5
Dependent Claim
63 words
A method for manufacturing a semiconductor memory device according to claim 3, wherein said step of forming the field effect device includes the steps of: forming one electrode and the other electrode with a spacing therebetween and forming an insulated gate above said one electrode and the other electrode, said spacing between said one electrode and the other electrode forming a channel region.
Claim 6
Dependent Claim
51 words
A method for manufacturing a semiconductor memory device according to claim 4, wherein said step of forming said one electrode and the other electrode comprises the step of connecting one of said one electrode and the other electrode to said one impurity doped region or to the other impurity doped region.
Claim 7
Dependent Claim
28 words
A method for manufacturing a semiconductor memory device according to claim 5, wherein said step of forming said conductor layer comprises the step of forming a polysilicon layer.
Claim 8
Dependent Claim
32 words
A method for manufacturing a semiconductor memory device according to claim 6, wherein said step of forming a thick insulating portion for separation comprises the step of forming a field oxide film.
Claim 9
Dependent Claim
40 words
A method for manufacturing a semiconductor memory device according to claim 7, wherein said step of forming a thick insulating portion for separation comprises the step of forming an inversion preventing region for preventing inversion below said field oxide film.
Claim 10
Dependent Claim
45 words
A method for manufacturing a semiconductor memory device according to claim 8, wherein said step of forming said inversion preventing region comprises the step of forming a region having the same conductivity type as said semiconductor substrate and a higher impurity concentration than said substrate.
Claim 11
Dependent Claim
59 words
A method for manufacturing a semiconductor memory device according to claim 9, wherein said step of forming the conductor layer comprises the steps of forming a conductor layer in a form having surfaces facing the side walls and the bottom surface of said trench on said insulating film; and depositing an oxide film on the surface of said trench.
Claim 12
Independent Claim
301 words
A method for manufacturing a semiconductor memory device comprising the steps of: forming, on a semiconductor substrate (1) having a predetermined impurity concentration of a certain conductivity type, a trench having a surface for forming a capacitor thereon storing information represented by charge, including forming said trench with opposed lateral side walls substantially perpendicular to said main surface of said semiconductor substrate extending from said main surface to a bottom surface of said trench; bisecting said trench into first and second lateral halves by implanting boron ions into a central portion of said bottom surface of said trench to form a thick insulating portion (3) for separation; forming a field oxide layer (2) on said thick insulating portion; forming first and second impurity doped regions (6a) of the opposite conductivity type in said side walls of said trench and bottom surfaces of respective lateral halves of said trench so that said impurity doped regions are contiguous from an upper main substrate surface down along a respective side wall of said trench and onto a respective adjoining lateral bottom surface half of said trench; forming an insulating layer (5) simultaneously on the side walls and the bottom surface of said trench, on said first and second impurity doped regions (6a), and on surface portions of said substrate adjacent said trench, said insulating layer (5) to said insulating portion (2) and separating said first and second impurity doped regions (6a) from each other by said insulating portion (2); and orienting a U-shaped conductive layer (4) on said insulating layer (5) on said side walls and across the bottom surface of said trench, sharing said U-shaped conductive layer (4) by said first and second impurity doped regions (6a) adjacent the sides of said thick insulating portion and forming separate capacitors for storing electric charges.
Claim 13
Independent Claim
301 words
A method for manufacturing a semiconductor memory device comprising the steps of: forming, on a semiconductor substrate (1) having a predetermined impurity concentration of a certain conductivity type, a trench having a surface for forming a capacitor thereon storing information represented by charge, including forming said trench with opposed lateral side walls substantially perpendicular to said main surface of said semiconductor substrate extending from said main surface to a bottom surface of said trench; bisecting said trench into first and second lateral halves by implanting boron ions into a central portion of said bottom surface of said trench to form a thick insulating portion (3) for separation; forming a field oxide layer (2) on said thick insulating portion; forming first and second impurity doped regions (6a) of the opposite conductivity type in said side walls of said trench and bottom surfaces of respective lateral halves of said trench so that said impurity doped regions are contiguous from an upper main substrate surface down along a respective side wall of said trench and onto a respective adjoining lateral bottom surface half of said trench; forming an insulating layer (5) simultaneously on the side walls and the bottom surface of said trench, on said first and second impurity doped regions (6a), and on surface portions of said substrate adjacent said trench, said insulating layer (5) to said insulating portion (2) and separating said first and second impurity doped regions (6a) from each other by said insulating portion (2); and orienting a U-shaped conductive layer (4) on said insulating layer (5) on said side walls and across the bottom surface of said trench, sharing said U-shaped conductive layer (4) by said first and second impurity doped regions (6a) adjacent the sides of said thick insulating portion and forming separate capacitors for storing electric charges.
Claim 14
Independent Claim
146 words
A method for manufacturing a semiconductor memory device comprising the steps of: preparing a semiconductor substrate of a predetermined impurity concentration of a certain conductivity type and having a main surface; forming on said semiconductor substrate a trench to be used to provide a surface for forming a capacitor thereon for storing information represented by charge; forming a thick insulating portion for separation extending longitudinally only in the central portion of the bottom surface of said trench, whereby said trench is separated into one lateral half and the other lateral half; forming an insulating layer simultaneously on the side walls, the bottom surface of said trench, and on surface portions of said substrate adjacent said trench, said insulating layer connected to said insulating portion; and forming a U-shaped conductive layer on said insulating layer on said side walls and across the bottom surface of said trench.
Claim 15
Independent Claim
146 words
A method for manufacturing a semiconductor memory device comprising the steps of: preparing a semiconductor substrate of a predetermined impurity concentration of a certain conductivity type and having a main surface; forming on said semiconductor substrate a trench to be used to provide a surface for forming a capacitor thereon for storing information represented by charge; forming a thick insulating portion for separation extending longitudinally only in the central portion of the bottom surface of said trench, whereby said trench is separated into one lateral half and the other lateral half; forming an insulating layer simultaneously on the side walls, the bottom surface of said trench, and on surface portions of said substrate adjacent said trench, said insulating layer connected to said insulating portion; and forming a U-shaped conductive layer on said insulating layer on said side walls and across the bottom surface of said trench.
Claim 16
Dependent Claim
34 words
A method for manufacturing a semiconductor memory device according to claim 12, further comprising the step of forming semiconductor elements on both sides of the trench on the main surface of said semiconductor substrate.
Claim 17
Dependent Claim
40 words
A method for manufacturing a semiconductor memory device according to claim 13, wherein step of forming said insulating layer formed on said surface portions of said substrate insulations and separates said semiconductor elements formed on both sides of the trench.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-12-24 | 1994-06-25 | 1994-12-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-12-24 | 1998-06-25 | 1998-12-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-12-24 | 2002-06-25 | 2002-12-25 | $7700.00 | Window Closed / Lapsed |