US4975604A
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US
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Automatic return-loss optimization of a variable fet attenuator
Assignee: Qorvo US Inc
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Filing: 1989-11-02
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Granted: 1990-12-04
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Expires: 2009-11-02
Abstract
Abstract A variable FET attenuator uses feedback in a control loop to correct the attenuator automatically for input/output return loss as the attenuator is varied with a control signal input. Both the series and shunt variable FETs are set to the proper conductance to maintain a proper input match with a desired attenuation value. A second, reference attenuator circuit provides feedback control of the primary attenuator circuit through an operational amplifier. The reference circuit is designed to be electrically equivalent to the attenuator circuit in terms of characteristic impedance. The control nodes, and attenuation control signal input and an output from the operational amplifier, are paralleled so that both the reference and primary attenuator circuits behave identically, without having to RF decouple the feedback loop from the attenuator circuit. Preferably, identical bridged-T variable attenuators are used for both the attenuator circuit and the reference circuit. Precise matching is obtained by incorporating both circuits in the same monolithic integrated circuit substrate, together with the operational amplifier.
Inventors
- 👤 Gary S. Barta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 04:56
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/02; H03H11/24; H03H11/245
Claims Analysis
Total Claims: 35
Claim 1
Independent Claim
196 words
A variable FET attenuator with automatic return-loss optimization, comprising: attenuator circuit means for variably attenuating an input signal and providing an output signal, the attenuator circuit means including: a first series FET having a source and drain defining a signal input and output and a gate coupled to an attenuation control signal input; a first shunt FET having a gate, a drain, and a source coupled to a reference voltage node; and first means for producing a characteristic impedance from the signal input and output to the reference voltage node; each of the first FETs having a conductance that is variable in accordance with a bias applied to their respective gates; reference circuit means, including a second shunt FET and a second series FET, each having a gate, source and drain, and second means for producing said characteristic impedance, coupled in a manner electrically equivalent to the attenuator circuit means, for generating a reference signal that varies with an attenuation control signal applied to the attenuation control input; and operational amplifier means having said reference signal as a first input for generating a control signal for biasing the gates of the first and second shunt FETs.
Claim 2
Dependent Claim
196 words
A variable FET attenuator with automatic return-loss optimization, comprising: attenuator circuit means for variably attenuating an input signal and providing an output signal, the attenuator circuit means including: a first series FET having a source and drain defining a signal input and output and a gate coupled to an attenuation control signal input; a first shunt FET having a gate, a drain, and a source coupled to a reference voltage node; and first means for producing a characteristic impedance from the signal input and output to the reference voltage node; each of the first FETs having a conductance that is variable in accordance with a bias applied to their respective gates; reference circuit means, including a second shunt FET and a second series FET, each having a gate, source and drain, and second means for producing said characteristic impedance, coupled in a manner electrically equivalent to the attenuator circuit means, for generating a reference signal that varies with an attenuation control signal applied to the attenuation control input; and operational amplifier means having said reference signal as a first input for generating a control signal for biasing the gates of the first and second shunt FETs.
Claim 3
Dependent Claim
65 words
A variable FET attenuator according to claim 1, including means for generating a fixed reference voltage, the operational amplifier means having said fixed reference voltage as a second input and being operable to set the control signal to a level which biases the second shunt FET to a conductance such that a voltage level of the first input is equalized to the fixed reference voltage.
Claim 4
Dependent Claim
42 words
A variable FET attenuator according to claim 1, in which the operational amplifier means has an output coupled to the gate of each of the first and second shunt FETs for biasing the gates of both shunt FETs with said control signal.
Claim 5
Dependent Claim
97 words
A variable FET attenuator according to claim 1, including means for generating a fixed reference voltage; the operational amplifier means having said fixed reference voltage as a second input, an output coupled to the gate of each of the first and second shunt FETs for biasing both shunt FETs with said control signal, and being operable to set the control signal to a level which biases the second shunt FET to a conductance such that a voltage level of the first input is equalized to the fixed reference voltage, and thereby similarly biasing the first shunt FET.
Claim 6
Dependent Claim
34 words
A variable FET attenuator according to claim 1, in which the operational amplifier means is designed so that said control signal has a bandwidth substantially less than a bandwidth of the attenuator circuit means.
Claim 7
Dependent Claim
43 words
A variable FET attenuator according to claim 1, in which the operational amplifier means includes a differential input stage having said reference signal as a said first input and having a second input coupled to a terminating impedance equivalent to said characteristic impedance.
Claim 8
Dependent Claim
38 words
A variable FET attenuator according to claim 1, in which the reference circuit means includes a terminating impedance connected in series with the source of the second series FET, the terminating impedance being equivalent to said characteristic impedance.
Claim 9
Dependent Claim
59 words
A variable FET attenuator according to claim 1, in which the attenuation control signal input is coupled in parallel to the gate of each of the first and second series FETs and an output for said control signal from the operational amplifier means is coupled in parallel to the gate of each of the first and second shunt FETs.
Claim 10
Dependent Claim
22 words
A variable FET attenuator according to claim 1, in which the attenuator circuit means is provided by a bridged-T FET attenuator circuit.
Claim 11
Dependent Claim
22 words
A variable FET attenuator according to claim 9, in which the reference circuit means is provided by a bridged-T FET attenuator circuit.
Claim 12
Dependent Claim
23 words
A variable FET attenuator according to claim 1, in which the attenuator circuit means is provided by a symmetrical T FET attenuator circuit.
Claim 13
Dependent Claim
23 words
A variable FET attenuator according to claim 11, in which the reference circuit means is provided by a symmetrical T FET attenuator circuit.
Claim 14
Dependent Claim
28 words
A variable FET attenuator according to claim 1 in which at least the attenuator circuit means and the reference circuit means are implemented in a monolithic integrated circuit.
Claim 15
Dependent Claim
20 words
A variable FET attenuator according to claim 13 in which the operational amplifier means is implemented in the integrated circuit.
Claim 16
Dependent Claim
28 words
A variable FET attenuator according to claim 14 in which the attenuator circuit means has an input/output signal bandwidth in the range of 1 GHz to 10 GHz.
Claim 17
Dependent Claim
20 words
A variable FET attenuator according to claim 13 in which the integrated circuit is fabricated on a gallium arsenide substrate.
Claim 18
Dependent Claim
22 words
A variable FET attenuator according to claim 1, in which the attenuator circuit means is provided by a pi FET attenuator circuit.
Claim 19
Dependent Claim
22 words
A variable FET attenuator according to claim 17, in which the reference circuit means is provided by a pi FET attenuator circuit.
Claim 20
Independent Claim
173 words
A method for automatic return-loss optimization of a variable FET attenuator for variably attenuating a signal of interest, the attenuator including a first series FET having a gate and a source and drain defining a signal input and output, and a first shunt FET having a gate, a source, and a drain coupled to the first series FET so that each of the signal input and output have a characteristic impedance; the method comprising: providing a reference circuit electrically equivalent to the attenuator circuit and having input and output terminals; inputting a variable attenuation control signal to the gate of the first series FET in the attenuator circuit to variably control attenuation of the signal of interest and to the input terminal of the reference circuit; generating from the reference circuit a reference signal that varies with the attenuation control signal; generating a control signal from the reference signal; and controlling operation of the reference circuit with said control signal; and biasing the gate of the first shunt FET with said control signal.
Claim 21
Independent Claim
173 words
A method for automatic return-loss optimization of a variable FET attenuator for variably attenuating a signal of interest, the attenuator including a first series FET having a gate and a source and drain defining a signal input and output, and a first shunt FET having a gate, a source, and a drain coupled to the first series FET so that each of the signal input and output have a characteristic impedance; the method comprising: providing a reference circuit electrically equivalent to the attenuator circuit and having input and output terminals; inputting a variable attenuation control signal to the gate of the first series FET in the attenuator circuit to variably control attenuation of the signal of interest and to the input terminal of the reference circuit; generating from the reference circuit a reference signal that varies with the attenuation control signal; generating a control signal from the reference signal; and controlling operation of the reference circuit with said control signal; and biasing the gate of the first shunt FET with said control signal.
Claim 22
Dependent Claim
27 words
A method according to claim 19 including controlling the reference circuit with said control signal so as to equate the reference signal to a fixed reference voltage.
Claim 23
Dependent Claim
39 words
A method according to claim 19, in which generating said control signal includes inputting said reference signal as a first input to an operational amplifier and inputting a second, fixed reference voltage as a second input to said amplifier.
Claim 24
Dependent Claim
56 words
A method according to claim 19 in which the reference circuit includes a second series FET and a second shunt FET configured equivalently to the first series and shunt FETs of the attenuator circuit, the step of controlling operation of the reference circuit including biasing the gate of the second shunt FET with said control signal.
Claim 25
Dependent Claim
40 words
A method according to claim 19, including variably biasing the gates of the series and shunt FETs to control their relative conductance so that the characteristic impedance remains substantially constant over a predetermined bandwidth for a predetermined range of attenuation.
Claim 26
Dependent Claim
38 words
A method according to claim 19, including variably biasing the gates of the series and shunt FETs to control their relative conductance so as to optimize return loss over a predetermined bandwidth for a predetermined range of attenuation.
Claim 27
Dependent Claim
19 words
A method according to claim 19, including terminating the reference circuit with an impedance equivalent to said characteristic impedance.
Claim 28
Independent Claim
182 words
A method for automatic return-loss optimization of a variable FET attenuator for variably attenuating a signal of interest, the attenuator including a first series FET having a gate, a source, and a drain defining a signal input and output, and a first shunt FET having a gate, a source, and a drain coupled to the first series FET so that each of the signal input and output have a characteristic impedance; the method comprising: providing a reference circuit electrically equivalent to the attenuator and having input and output terminals; applying a first, variable attenuation control signal to the gate of the first series FET to control attenuation of the signal of interest, and to the input terminal of the reference circuit; generating from the reference circuit a reference signal that varies with the attenuation control signal; generating a second control signal from the reference signal; controlling operation of the reference circuit with the second control signal so as to equate the reference signal to a fixed reference voltage; and biasing the gate of the first shunt FET with said second control signal.
Claim 29
Independent Claim
182 words
A method for automatic return-loss optimization of a variable FET attenuator for variably attenuating a signal of interest, the attenuator including a first series FET having a gate, a source, and a drain defining a signal input and output, and a first shunt FET having a gate, a source, and a drain coupled to the first series FET so that each of the signal input and output have a characteristic impedance; the method comprising: providing a reference circuit electrically equivalent to the attenuator and having input and output terminals; applying a first, variable attenuation control signal to the gate of the first series FET to control attenuation of the signal of interest, and to the input terminal of the reference circuit; generating from the reference circuit a reference signal that varies with the attenuation control signal; generating a second control signal from the reference signal; controlling operation of the reference circuit with the second control signal so as to equate the reference signal to a fixed reference voltage; and biasing the gate of the first shunt FET with said second control signal.
Claim 30
Dependent Claim
63 words
A method according to claim 26 in which the reference circuit includes a second series FET and a second shunt FET configured equivalently to the first series and shunt FETs, respectively, and in which the step of controlling operation of the reference circuit includes biasing the gate of the second shunt FET with said second control signal in parallel with the attenuator circuit.
Claim 31
Dependent Claim
63 words
A method according to claim 26 in which the reference circuit includes a second series FET and a second shunt FET configured equivalently to the first series and shunt FETs, respectively, and in which the step of controlling operation of the reference circuit includes biasing the gate of the second shunt FET with said second control signal in parallel with the attenuator circuit.
Claim 32
Independent Claim
182 words
A method for automatic return-loss optimization of a variable FET attenuator for variably attenuating a signal of interest, the attenuator including a first series FET having a gate, a source, and a drain defining a signal input and output, and a first shunt FET having a gate, a source, and a drain coupled to the first series FET so that each of the signal input and output have a characteristic impedance; the method comprising: providing a reference circuit electrically equivalent to the attenuator and having input and output terminals; applying a first, variable attenuation control signal to the gate of the first shunt FET to control attenuation of the signal of interest, and to the input terminal of the reference circuit; generating from the reference circuit a reference signal that varies with the attenuation control signal; generating a second control signal from the reference signal; controlling operation of the reference circuit with the second control signal so as to equate the reference signal to a fixed reference voltage; and biasing the gate of the first series FET with said second control signal.
Claim 33
Independent Claim
182 words
A method for automatic return-loss optimization of a variable FET attenuator for variably attenuating a signal of interest, the attenuator including a first series FET having a gate, a source, and a drain defining a signal input and output, and a first shunt FET having a gate, a source, and a drain coupled to the first series FET so that each of the signal input and output have a characteristic impedance; the method comprising: providing a reference circuit electrically equivalent to the attenuator and having input and output terminals; applying a first, variable attenuation control signal to the gate of the first shunt FET to control attenuation of the signal of interest, and to the input terminal of the reference circuit; generating from the reference circuit a reference signal that varies with the attenuation control signal; generating a second control signal from the reference signal; controlling operation of the reference circuit with the second control signal so as to equate the reference signal to a fixed reference voltage; and biasing the gate of the first series FET with said second control signal.
Claim 34
Dependent Claim
63 words
A method according to claim 29 in which the reference circuit includes a second series FET and a second shunt FET configured equivalently to the first series and shunt FETs, respectively, and in which the step of controlling operation of the reference circuit includes biasing the gate of the second series FET with said second control signal in parallel with the attenuator circuit.
Claim 35
Dependent Claim
63 words
A method according to claim 29 in which the reference circuit includes a second series FET and a second shunt FET configured equivalently to the first series and shunt FETs, respectively, and in which the step of controlling operation of the reference circuit includes biasing the gate of the second shunt FET with said first control signal in parallel with the attenuator circuit.
References Cited (Backward Citations)
US3710270A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-12-03 | 1994-06-04 | 1994-12-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-12-03 | 1998-06-04 | 1998-12-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-12-03 | 2002-06-04 | 2002-12-04 | $7700.00 | Window Closed / Lapsed |