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US4974208A Expired / Lapsed US ⏱️ 0.0 years remaining

Microcomputer incorporating a nonvolatile semiconductor memory

Assignee: Hitachi Ltd
•
Filing: 1990-03-30
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Granted: 1990-11-27
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Expires: 2010-03-30
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Abstract

Abstract A microcomputer with a non-volatile memory has a plurality of nonvolatile data memory elements arranged in a matrix and a means for reading data from the memory elements in accordance with an address signal which specifies a position in the matrix. A protecting data memory element for storing at least one-bit protection data is disposed in the matrix. Whether a programming (writing), erasing or reading operation with respect to the data memory elements is to be allowed or inhibited is determined in accordance with the contents of the protecting data memory element which are read out in response to the address signal.

Inventors

  • 👤 Hideo Nakamura
  • 👤 Terumi Sawase

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 17:11
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/22; G11C7/00; G11C7/24

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 173 words
A microcomputer which incorporates a nonvolatile semiconductor memory, said nonvolatile semiconductor memory comprising: a plurality of data memory elements arranged in a matrix; a protecting data memory element for storing at least 1-bit protection data disposed within said matrix; first means for accessing a selected one element within said plurality of data memory elements and said protection data memory element in accordance with an address signal specified with respect to said matrix; and second means for reading out the content of said protecting data memory element, whereby whether a programming (writing), erasing or reading operation with respect to said selected one element is to be allowed or inhibited is determined in accordance with the content of said protecting data memory element, wherein said first means accesses said selected one element and said protection data memory element via a common word line, wherein said data memory elements are respectively comprised of electrically erasable and programmable memory elements, and wherein said protecting data memory element is comprised of an electrically erasable and programmable memory element.
Claim 2
Dependent Claim 173 words
A microcomputer which incorporates a nonvolatile semiconductor memory, said nonvolatile semiconductor memory comprising: a plurality of data memory elements arranged in a matrix; a protecting data memory element for storing at least 1-bit protection data disposed within said matrix; first means for accessing a selected one element within said plurality of data memory elements and said protection data memory element in accordance with an address signal specified with respect to said matrix; and second means for reading out the content of said protecting data memory element, whereby whether a programming (writing), erasing or reading operation with respect to said selected one element is to be allowed or inhibited is determined in accordance with the content of said protecting data memory element, wherein said first means accesses said selected one element and said protection data memory element via a common word line, wherein said data memory elements are respectively comprised of electrically erasable and programmable memory elements, and wherein said protecting data memory element is comprised of an electrically erasable and programmable memory element.
Claim 3
Dependent Claim 33 words
A microcomputer according to claim 1, wherein said first means simultaneously accesses said selected one element and said protection data memory element in a reading operation with respect to said selected one element.
Claim 4
Dependent Claim 37 words
A microcomputer according to claim 1, wherein said first means accesses said protection data memory element prior to accessing said selected one element in a programming (writing) or erasing operation with respect to said selected on element.
Claim 5
Dependent Claim 14 words
A microcomputer according to claim 1, wherein said microcomputer is applied to a card.
Claim 6
Dependent Claim 174 words
A microcomputer which incorporates a nonvolatile semiconductor memory, said nonvolatile semiconductor memory comprising: a plurality of data memory elements arranged in a matrix; a protecting data memory element for storing at least 1-bit protection data disposed within said matrix; first means for accessing a selected one element within said plurality of data memory elements and said protection data memory element in accordance with an address signal specified with respect to said matrix; second means for reading out the content of said protecting data memory element; and third means for generating an inhibition signal in response to the content of said protecting data and an external signal inputted from outside of said microcomputer, whereby whether a programming (writing), erasing or reading operation with respect to said selected one element is to be allowed or inhibited is determined in accordance with said inhibition signal, wherein said data memory elements are respectively comprised of electrically erasable and programmable memory elements, and wherein said protecting data memory element is comprised of an electrically erasable and programmable memory element.
Claim 7
Dependent Claim 174 words
A microcomputer which incorporates a nonvolatile semiconductor memory, said nonvolatile semiconductor memory comprising: a plurality of data memory elements arranged in a matrix; a protecting data memory element for storing at least 1-bit protection data disposed within said matrix; first means for accessing a selected one element within said plurality of data memory elements and said protection data memory element in accordance with an address signal specified with respect to said matrix; second means for reading out the content of said protecting data memory element; and third means for generating an inhibition signal in response to the content of said protecting data and an external signal inputted from outside of said microcomputer, whereby whether a programming (writing), erasing or reading operation with respect to said selected one element is to be allowed or inhibited is determined in accordance with said inhibition signal, wherein said data memory elements are respectively comprised of electrically erasable and programmable memory elements, and wherein said protecting data memory element is comprised of an electrically erasable and programmable memory element.
Claim 8
Dependent Claim 27 words
A microcomputer according to claim 5, wherein said external signal is a signal for key word detection, and wherein said third means is a dismatching detection circuit.
Claim 9
Dependent Claim 14 words
A microcomputer according to claim 5, wherein said microcomputer is applied to a card.
Claim 10
Dependent Claim 221 words
A microcomputer which incorporates a nonvolatile semiconductor memory, said nonvolatile semiconductor memory comprising: a plurality of data memory elements arranged in a matrix; a plurality of protecting data memory elements disposed in one line of said matrix, wherein each protecting data memory element stores at least 1-bit protection data; first means for accessing a selected one element within said plurality of data memory elements and said protection data memory element in accordance with an address signal specified with respect to said matrix; and second means for reading out the content of said protecting data memory element, wherein said plurality of protecting data memory elements are disposed in one line of said matrix, each element stores at least 1-bit protection data, and each protection data corresponds to each row of said data memory matrix, whereby whether a programming (writing), erasing or reading operation with respect to said selected one element is to be allowed or inhibited is determined in accordance with the content of said corresponding protecting data memory element, wherein said first means accesses said selected one element and said protection data memory element via a common word line, wherein said data memory elements are respectively comprised of electrically erasable and programmable memory elements, and wherein said protecting data memory element is comprised of an electrically erasable and programmable memory element.
Claim 11
Dependent Claim 221 words
A microcomputer which incorporates a nonvolatile semiconductor memory, said nonvolatile semiconductor memory comprising: a plurality of data memory elements arranged in a matrix; a plurality of protecting data memory elements disposed in one line of said matrix, wherein each protecting data memory element stores at least 1-bit protection data; first means for accessing a selected one element within said plurality of data memory elements and said protection data memory element in accordance with an address signal specified with respect to said matrix; and second means for reading out the content of said protecting data memory element, wherein said plurality of protecting data memory elements are disposed in one line of said matrix, each element stores at least 1-bit protection data, and each protection data corresponds to each row of said data memory matrix, whereby whether a programming (writing), erasing or reading operation with respect to said selected one element is to be allowed or inhibited is determined in accordance with the content of said corresponding protecting data memory element, wherein said first means accesses said selected one element and said protection data memory element via a common word line, wherein said data memory elements are respectively comprised of electrically erasable and programmable memory elements, and wherein said protecting data memory element is comprised of an electrically erasable and programmable memory element.
Claim 12
Dependent Claim 14 words
A microcomputer according to claim 8, wherein said microcomputer is applied to a card.

References Cited (Backward Citations)

US4327410A Cited
US4744062A Cited
US4920518A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-11-26 1994-05-28 1994-11-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-11-26 1998-05-28 1998-11-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-11-26 2002-05-28 2002-11-27 $7700.00 Window Closed / Lapsed

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