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US4974157A Expired / Lapsed US ⏱️ 0.0 years remaining

Data processing system

Assignee: Advanced Processor Design Ltd
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Filing: 1989-08-22
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Granted: 1990-11-27
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Expires: 2009-08-22
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Abstract

Abstract A data processing system for executing operations on electronic data comprises a stack for performing numerical operations functionally situated between the top of the stack and the next storage position in the stack so that operands on which an operation is to be performed are automatically present at inputs of an arithmetic logic unit for performing the operations.

Inventors

  • 👤 Alan F. T. Winfield
  • 👤 Rodney M. F. Goodman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 11:46
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/30098; G06F9/3012; G06F9/30134; G06F9/30145; G06F9/3016; G06F9/30163; G06F9/34; G06F9/44

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 180 words
A data processing system for executing arithmetical and logical operations on electronic data comprising a stack in which data is stored in respective storage elements in sequence and retrieved from the storage elements on a first in, last out bias from one end of the sequence referred to as the top of the stack, a stack pointer for addressing the storage element which is at the top of the stack, and an arithmetic logic unit for performing arithmetical and logical operations on data presented at inputs thereto and generating a result that is produced at an output; wherein said inputs of said arithmetic logic unit are connected to the storage element at the top of the stack and to the next storage element in the sequence of the stack so that data on which an operation is to be performed is automatically present at inputs of said arithmetic logic unit, and the output of the arithmetic logic unit is connected to the storage element at the top of stack so that the result of an operation is automatically returned thereto.
Claim 2
Dependent Claim 180 words
A data processing system for executing arithmetical and logical operations on electronic data comprising a stack in which data is stored in respective storage elements in sequence and retrieved from the storage elements on a first in, last out bias from one end of the sequence referred to as the top of the stack, a stack pointer for addressing the storage element which is at the top of the stack, and an arithmetic logic unit for performing arithmetical and logical operations on data presented at inputs thereto and generating a result that is produced at an output; wherein said inputs of said arithmetic logic unit are connected to the storage element at the top of the stack and to the next storage element in the sequence of the stack so that data on which an operation is to be performed is automatically present at inputs of said arithmetic logic unit, and the output of the arithmetic logic unit is connected to the storage element at the top of stack so that the result of an operation is automatically returned thereto.
Claim 3
Dependent Claim 20 words
A data processing system according to claim 1, wherein the stack is a data structure implemented in random access memory.
Claim 4
Dependent Claim 222 words
A central processor unit, comprising: a data processing unit for executing arithmetical and logical operations on electronic data, which includes a first stack in which data is stored in respective storage elements in sequence and retrieved from the storage elements on a first in, last out bias from one end of the sequence referred to as the top of the stack, a stack pointer for addressing the storage element which is at the top of the stack, and an arithmetic logic unit for performing arithmetical and logical operations on data presented at inputs thereto and generating a result that is produced at an output, said inputs of said arithmetic logic unit being connected to the storage element at the top of the stack and to the next storage element in the sequence of the stack so that data on which an operation is to be performed is automatically present at inputs of said arithmetic logic unit, and the output of the arithmetic logic unit being connected to the storage element at the top of stack so that the result of an operation is automatically returned thereto; a second first in, last out stack for storing subroutine return addresses of high level language procedures; and an execution sequencer functionally connected to both stacks to provide control signals thereto and to coordinate operation thereof.
Claim 5
Dependent Claim 222 words
A central processor unit, comprising: a data processing unit for executing arithmetical and logical operations on electronic data, which includes a first stack in which data is stored in respective storage elements in sequence and retrieved from the storage elements on a first in, last out bias from one end of the sequence referred to as the top of the stack, a stack pointer for addressing the storage element which is at the top of the stack, and an arithmetic logic unit for performing arithmetical and logical operations on data presented at inputs thereto and generating a result that is produced at an output, said inputs of said arithmetic logic unit being connected to the storage element at the top of the stack and to the next storage element in the sequence of the stack so that data on which an operation is to be performed is automatically present at inputs of said arithmetic logic unit, and the output of the arithmetic logic unit being connected to the storage element at the top of stack so that the result of an operation is automatically returned thereto; a second first in, last out stack for storing subroutine return addresses of high level language procedures; and an execution sequencer functionally connected to both stacks to provide control signals thereto and to coordinate operation thereof.

References Cited (Backward Citations)

US4173782A Cited
US4422141A Cited
US4455604A Cited
US4694411A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-11-26 1994-05-28 1994-11-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-11-26 1998-05-28 1998-11-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-11-26 2002-05-28 2002-11-27 $7700.00 Window Closed / Lapsed

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