← Back to Patent Explorer
US4974041A Expired / Lapsed US ⏱️ 0.0 years remaining

Integrated circuit structure with multiple common planes and method of forming the same

Assignee: The AT&T MVPD Group LLC
•
Filing: 1988-08-15
•
Granted: 1990-11-27
•
Expires: 2008-08-15
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An integrated circuit structure and method of forming the same is described in which a plurality of common signal planes are provided for an integrated circuit formed on a layer of semiconductive material (30). The common planes consist of a single crystal semiconductive substrate (2) and at least one conductive layer (26, 66) between the substrate (2) and the semiconductive circuit layer (30), with insulative layers (24, 28, 68) separating the conductive layers (26, 66) from each other and from the substrate (2) and semiconductive layer (30). When one conductive layer (26) is used, a power supply signal (V+) is preferably applied to the substrate (2) and a ground reference to the conductive layer (26). Contacts are made between the integrated circuit and the desired common planes by metallized contacts (56, 60) formed in openings (54, 58) through the underlying material. Various circuit signals can also be introduced through additional conductive layers. In either case, only the top layer of semiconductive material (30) needs to be recrystallized from the substrate (2) into single crystal form, even if the conductive layers (26, 66) are provided as heavily doped semiconductive materials. The novel structure greatly reduces the surface area devoted to metallization, and practically eliminates cross-talk between components. It also enables a reduction of metallization levels from two to one, significantly increasing circuit yield.

Inventors

  • 👤 Jan Grinberg

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 09:36
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/211; H10D88/00; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1912; H10W; H10W10/00; H10W10/10; H10W10/181; H10W20/00; H10W20/40; H10W20/41; H10W20/427

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 93 words
An integrated circuit structure, comprising: a semiconductor substrate, a first layer of insulative material over the substrate, a layer of conductive material over the first layer of insulative material, a second layer of insulative material over the layer of conductive material, a layer of semiconductive material over the second layer of insulative material, with an integrated circuit fabricated thereon, means for applying respective signal connections to respective ones of the substrate and conductive layer, and means for connecting the substrate and conductive layer to locations on the integrated circuit requiring their respective signals.
Claim 2
Dependent Claim 93 words
An integrated circuit structure, comprising: a semiconductor substrate, a first layer of insulative material over the substrate, a layer of conductive material over the first layer of insulative material, a second layer of insulative material over the layer of conductive material, a layer of semiconductive material over the second layer of insulative material, with an integrated circuit fabricated thereon, means for applying respective signal connections to respective ones of the substrate and conductive layer, and means for connecting the substrate and conductive layer to locations on the integrated circuit requiring their respective signals.
Claim 3
Dependent Claim 17 words
The integrated circuit structure of claim 1, wherein the signal connections comprise ground and power supply connections.
Claim 4
Dependent Claim 27 words
The integrated circuit structure of claim 2, wherein the power supply connection is applied to the substrate and the ground connection is applied to the conductive layer.
Claim 5
Dependent Claim 17 words
The integrated circuit structure of claim 1, wherein the conductive layer comprises a heavily doped semiconductor material.
Claim 6
Dependent Claim 19 words
The integrated circuit structure of claim 4, wherein the substrate, semiconductive layer and conductive layer are formed from silicon.
Claim 7
Dependent Claim 19 words
The integrated circuit structure of claim 1, wherein the first and second insulative layers are formed from silicon dioxide.
Claim 8
Dependent Claim 117 words
An integrated circuit structure, comprising: a semiconductor substrate, a plurality of layers of conductive material disposed over the substrate in succession, a plurality of layers of insulative material respectively disposed immediately under each of the conductive layers, with an insulative layer for each conductive layer, an additional layer of insulative material over the uppermost conductive layer, a layer of semiconductive material over the additional insulative layer, with an integrated circuit fabricated thereon, means for supplying ground, power supply and signal connections to respective ones of the substrate and conductive layers, and means connecting the substrate and conductive layers to locations on the integrated circuit requiring a ground, power supply or signal connection, as the case may be.
Claim 9
Dependent Claim 117 words
An integrated circuit structure, comprising: a semiconductor substrate, a plurality of layers of conductive material disposed over the substrate in succession, a plurality of layers of insulative material respectively disposed immediately under each of the conductive layers, with an insulative layer for each conductive layer, an additional layer of insulative material over the uppermost conductive layer, a layer of semiconductive material over the additional insulative layer, with an integrated circuit fabricated thereon, means for supplying ground, power supply and signal connections to respective ones of the substrate and conductive layers, and means connecting the substrate and conductive layers to locations on the integrated circuit requiring a ground, power supply or signal connection, as the case may be.
Claim 10
Dependent Claim 30 words
The integrated circuit structure of claim 7, wherein the power supply and ground connections are applied to respective ones of the substrate and the first conductive layer above the substrate.
Claim 11
Dependent Claim 31 words
The integrated circuit structure of claim 8, wherein the power supply connection is applied to the substrate and the ground connection is applied to the first conductive layer above the substrate.
Claim 12
Dependent Claim 17 words
The integrated circuit structure of claim 7, wherein the conductive layers comprise a heavily doped semiconductor material.
Claim 13
Dependent Claim 19 words
The integrated circuit structure of claim 10, wherein the substrate, semiconductive layer and conductive layers are formed from silicon.
Claim 14
Dependent Claim 16 words
The integrated circuit structure of claim 7, wherein the insulative layers are formed from silicon dioxide.

References Cited (Backward Citations)

JPS56125868A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-11-26 1994-05-28 1994-11-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-11-26 1998-05-28 1998-11-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-11-26 2002-05-28 2002-11-27 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag