Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
212 words
In a programmable logic controller system including a programmable logic controller having input/output scanner means for reading data from and writing data to a plurality of peripheral controller as determined by a ladder diagram, each of said plurality of peripheral controllers for controlling a plurality of data points, said input/output scanner means including an input/output scan processor coupled to input/output ports, said input/output ports for coupling to said plurality of peripheral controllers, and a first data memory means for storing data read from and to be written to said peripheral controllers, the improvement comprising a logic scanner means coupled to said input/output scanner means for executing compiled Boolean logic statements representing said ladder diagram, wherein said logic scanner means comprises program memory means for storing said compiled Boolean logic statements, control logic means coupled to said input/output scan processor for storing logic equations, a Boolean processor coupled to said program memory means for directly executing said compiled Boolean logic statements under control of said logic equations, and second data memory means coupled to said Boolean processor for storing the status of each of said plurality of data points as determined by operation of said Boolean processor based upon said data sent from said peripheral controllers and stored in said first memory means.
Claim 2
Dependent Claim
212 words
In a programmable logic controller system including a programmable logic controller having input/output scanner means for reading data from and writing data to a plurality of peripheral controller as determined by a ladder diagram, each of said plurality of peripheral controllers for controlling a plurality of data points, said input/output scanner means including an input/output scan processor coupled to input/output ports, said input/output ports for coupling to said plurality of peripheral controllers, and a first data memory means for storing data read from and to be written to said peripheral controllers, the improvement comprising a logic scanner means coupled to said input/output scanner means for executing compiled Boolean logic statements representing said ladder diagram, wherein said logic scanner means comprises program memory means for storing said compiled Boolean logic statements, control logic means coupled to said input/output scan processor for storing logic equations, a Boolean processor coupled to said program memory means for directly executing said compiled Boolean logic statements under control of said logic equations, and second data memory means coupled to said Boolean processor for storing the status of each of said plurality of data points as determined by operation of said Boolean processor based upon said data sent from said peripheral controllers and stored in said first memory means.
Claim 3
Dependent Claim
16 words
The improvement defined by claim 1 wherein said program memory means comprises a random access memory.
Claim 4
Dependent Claim
21 words
The improvement defined by claim 1 wherein said control logic means comprises a programmed logic array programmed with said logic equations.
Claim 5
Dependent Claim
15 words
The improvement defined by claim 1 wherein said Boolean processor comprises a bit sliced microprocessor.
Claim 6
Dependent Claim
16 words
The improvement defined by claim 1 wherein said data memory means comprises a random access memory.