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US4956699A Expired / Lapsed US ⏱️ 0.0 years remaining

Signal synchronizing system

Assignee: NEC Home Electronics Ltd
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Filing: 1989-01-24
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Granted: 1990-09-11
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Expires: 2009-01-24
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Abstract

Abstract A signal synchronizing system comprising first circuit having a plurality of sync signals, second circuit having a plurality of sync signals corresponding to the sync signals of the first circuit, respectively, and a synchronizing control circuit which synchronizes output signals of the second circuit with output signals of the first circuit. The synchronizing control circuit inputs the plurality of sync signals of each of the first and second circuits, and outputs a control signal to the second circuit.

Inventors

  • 👤 Mitsuo Ohashi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 14:14
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/087; H03L7/14; H03L7/143

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 147 words
A signal synchronizing system, comprising: a first circuit having a plurality of sync output signals; a second circuit having a plurality of sync output signals corresponding to said sync signals of said first circuit; and means for receiving and synchronizing output signals from said first and second circuits and for generating a control signal to said second circuit, said synchronizing means comprising: a plurality of phase detectors corresponding to each of said sync signals of each of said first and second circuits; a selecting means for selecting outputs of said phase detectors; at least one lock condition detecting means connected to one of said phase detectors; means for controlling said selecting means in accordance with an output of said lock condition detecting means; and means for outputting said control signal to said second circuit, said outputting means being provided between said selecting means and said second circuit.
Claim 2
Dependent Claim 147 words
A signal synchronizing system, comprising: a first circuit having a plurality of sync output signals; a second circuit having a plurality of sync output signals corresponding to said sync signals of said first circuit; and means for receiving and synchronizing output signals from said first and second circuits and for generating a control signal to said second circuit, said synchronizing means comprising: a plurality of phase detectors corresponding to each of said sync signals of each of said first and second circuits; a selecting means for selecting outputs of said phase detectors; at least one lock condition detecting means connected to one of said phase detectors; means for controlling said selecting means in accordance with an output of said lock condition detecting means; and means for outputting said control signal to said second circuit, said outputting means being provided between said selecting means and said second circuit.
Claim 3
Dependent Claim 86 words
A signal synchronizing system, comprising: a first circuit having a plurality of sync output signals; a second circuit having a plurality of sync output signals corresponding to said sync signals of said first circuit; and means for receiving and synchronizing output signals from said first and second circuits and for generating a control signal to said second circuit, wherein said plurality of sync signals of each of said first and second circuits comprises a vertical sync signal, a horizontal sync signal and a dot clock signal.
Claim 4
Dependent Claim 86 words
A signal synchronizing system, comprising: a first circuit having a plurality of sync output signals; a second circuit having a plurality of sync output signals corresponding to said sync signals of said first circuit; and means for receiving and synchronizing output signals from said first and second circuits and for generating a control signal to said second circuit, wherein said plurality of sync signals of each of said first and second circuits comprises a vertical sync signal, a horizontal sync signal and a dot clock signal.
Claim 5
Dependent Claim 26 words
The signal synchronizing system of claim 1, further comprising a plurality of low-pass filters connected in series to an output of each of said phase detectors.
Claim 6
Dependent Claim 29 words
The signal synchronizing system of claim 1, wherein said control signal outputting means comprises a low-pass filter and a voltage control oscillator connected in series to said low-pass filter.
Claim 7
Dependent Claim 85 words
A signal synchronizing system, comprising: a first circuit having a plurality of sync output signals; a second circuit having a plurality of sync output signals corresponding to said sync signals of said first circuit; and means for receiving and synchronizing output signals from said first and second circuits and for generating a control signal to said second circuit, wherein said first and second circuits output analog R, G and B signals, digital R, G and B signals, an NTSC signal and an NTSC RF signal.
Claim 8
Dependent Claim 85 words
A signal synchronizing system, comprising: a first circuit having a plurality of sync output signals; a second circuit having a plurality of sync output signals corresponding to said sync signals of said first circuit; and means for receiving and synchronizing output signals from said first and second circuits and for generating a control signal to said second circuit, wherein said first and second circuits output analog R, G and B signals, digital R, G and B signals, an NTSC signal and an NTSC RF signal.
Claim 9
Dependent Claim 23 words
The signal synchronizing system of claim 1, wherein said first circuit outputs a subject signal and said second circuit outputs a reference signal.
Claim 10
Dependent Claim 27 words
The signal synchronizing system of claim 6, further comprising means for comparing said subject signal of said first circuit with said reference signal of said second circuit.
Claim 11
Dependent Claim 97 words
A signal synchronizing system, comprising: a first circuit having a plurality of reference sync output signals; a second circuit having a plurality of subject sync output signals corresponding to the sync signals of said first circuit; synchronizing means for receiving output signals from said first and second circuits, for comparing said signals, and for generating a control signal to said second circuit, said synchronizing means including a count trigger generating portion and a comparing portion, said count trigger generating portion receiving sync signals from said second circuit and generating a sampling clock signal to said comparing portion.
Claim 12
Dependent Claim 97 words
A signal synchronizing system, comprising: a first circuit having a plurality of reference sync output signals; a second circuit having a plurality of subject sync output signals corresponding to the sync signals of said first circuit; synchronizing means for receiving output signals from said first and second circuits, for comparing said signals, and for generating a control signal to said second circuit, said synchronizing means including a count trigger generating portion and a comparing portion, said count trigger generating portion receiving sync signals from said second circuit and generating a sampling clock signal to said comparing portion.

References Cited (Backward Citations)

GB1226019A Cited
GB1239298A Cited
US4346407A Cited
US4489348A Cited
GB2175470A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-09-10 1994-03-12 1994-09-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-09-10 1998-03-12 1998-09-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-09-10 2002-03-12 2002-09-11 $7700.00 Window Closed / Lapsed

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