US4955030A
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Method of manufacturing a semiconductor structure suitable for producing a multi-wavelength laser effect, and device obtained thereby
Assignee: L'ETAT FRANCAIS REPRESENTE PAR LE MINISTRE DES POSTES ET TELECOMMUNICATIONS
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Filing: 1989-06-13
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Granted: 1990-09-04
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Expires: 2009-06-13
Abstract
Abstract A double heterostructure stack comprising confinement layers (CC) enclosing active layers (CA) is formed on a substrate (S), e.g. a N+ type gallium arsenide substrate. Selective etching is performed so as to lay bare the confinement layers at different depths, e.g. CC4, CC3, CC2. The confinement layers initially receive contact layers (CP) made of P-type gallium arsenide. Regions R1, R2, and R3 are formed through the contact layers to constitute junctions with the uppermost active layers (respectively CA1, CA2, CA3). Valleys (V10, V21, V32) are formed to isolate the above-defined elementary stacks. After a metal contact layer has been formed, and after the end surfaces have been optically prepared, a multi-wavelength laser device is obtained.
Inventors
- 👤 Louis Menigaux
- 👤 Louis Dugrand
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 12:55
CPC Classifications
H; H01; H01S; H01S5/00; H01S5/40; H01S5/4025; H01S5/4031; H01S5/4043; H01S5/20; H10; H10H; H10H20/00; H10H20/01; H10H20/011; H10H20/013; H10H29/00; H10H29/10; H10H29/14; H01S5/2054; H01S5/2059; H10H20/80; H10H20/81; H10H20/813; Y; Y10; Y10S; Y10S148/00; Y10S148/095
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
263 words
A semiconductor device comprising: (a) a substrate; (b) a monocrystalline double heterostructure stack deposited on said substrate (D), said stack comprising active layers (CA) having different compositions and having light radiating properties, each of said layers being sandwiched between two confinement layers (CC) having a microcrystal lattice size adjacent to that of the active layers, with all of said layers having the same conductivity type; (c) selective etching on the top of the stack in parallel strips which are adjacent to one another, laying bare confinement layers (CC) at different depths, at least on two adjacent strips, with the confinement layers (CC) thus laid bare defining parallel terraces (T1, T2, T3) separated from one another by transitions (M12, M23); (d) a contact layer (CP) formed on said terraces; (e) an opposite conductivity type region (R1, R2, R3) in the strip included in each terrace formed by inserting impurities through the contact layer, said impurities corresponding to the same conductivity type as the contact layer and said region extending through the top confinement layer (CC2, CC3, CC4) to the vicinity of the active layer therebeneath (CA1, CA2, CA3) in order to constitute a P-N junction therewith (J1, J2, J3); (f) individual metal contacts (DM1, DM2, DM3) on each opposite conductivity type region; and (g) a common metal contact (DMS) on the substrate; wherein the opposite conductivity type regions are electrically isolated from one another (V10, V21, V32) at the transitions therebetween, to form semiconductor structure stripes, and the opposite ends of said stripes are optically prepared transversely to the long dimension of the terraces.
Claim 2
Dependent Claim
263 words
A semiconductor device comprising: (a) a substrate; (b) a monocrystalline double heterostructure stack deposited on said substrate (D), said stack comprising active layers (CA) having different compositions and having light radiating properties, each of said layers being sandwiched between two confinement layers (CC) having a microcrystal lattice size adjacent to that of the active layers, with all of said layers having the same conductivity type; (c) selective etching on the top of the stack in parallel strips which are adjacent to one another, laying bare confinement layers (CC) at different depths, at least on two adjacent strips, with the confinement layers (CC) thus laid bare defining parallel terraces (T1, T2, T3) separated from one another by transitions (M12, M23); (d) a contact layer (CP) formed on said terraces; (e) an opposite conductivity type region (R1, R2, R3) in the strip included in each terrace formed by inserting impurities through the contact layer, said impurities corresponding to the same conductivity type as the contact layer and said region extending through the top confinement layer (CC2, CC3, CC4) to the vicinity of the active layer therebeneath (CA1, CA2, CA3) in order to constitute a P-N junction therewith (J1, J2, J3); (f) individual metal contacts (DM1, DM2, DM3) on each opposite conductivity type region; and (g) a common metal contact (DMS) on the substrate; wherein the opposite conductivity type regions are electrically isolated from one another (V10, V21, V32) at the transitions therebetween, to form semiconductor structure stripes, and the opposite ends of said stripes are optically prepared transversely to the long dimension of the terraces.
Claim 3
Dependent Claim
15 words
A device according to claim 1, wherein the double heterostructure stack comprises Group III-V alloys.
Claim 4
Dependent Claim
41 words
A device according to claim 2, wherein the alloys are alloys of at least one material selected from the group consisting of: aluminum, gallium, and indium; and at least one material selected from the group consisting of: phosphorus, arsenic, and antimony.
Claim 5
Dependent Claim
62 words
A device according to claim 3, comprising a plurality of N-type active layers having the composition Ga 1-x Al x As, where x is different in each layer and is less than about 0.1, and a plurality of confinement layers having the composition Ga 1-y Al y As, where y is substantially the same for all layers and equal to about 0.3.
Claim 6
Dependent Claim
31 words
A device according to claim 1, wherein the thickness of the active layers is about one tenth of a micrometer, and the thickness of the confinement layers is about 1 micrometer.
Claim 7
Dependent Claim
15 words
A device according to claim 1, wherein the contact layer comprises a Group III-V alloy.
Claim 8
Dependent Claim
14 words
A device according to claim 6, wherein the contact layer is P-type gallium arsenide.
Claim 9
Dependent Claim
26 words
A device according to claim 1, wherein said region is formed by means of impurities selected from the group consisting of zinc, cadmium, magnesium, and beryllium.
Claim 10
Dependent Claim
20 words
A device according to claim 1, wherein the substrate comprises one of silicon and a highly N-doped Group III-V alloy.
Claim 11
Dependent Claim
111 words
A device according to claim 1 comprising: at least two double heterostructure stacks in the form of elongate stripes on the substrate, disposed side-by-side and electrically insulated from one another, said two stacks having different numbers of active layers, the layers being of differing compositions, and the opposite small ends of the stripes being optically prepared; two regions respectively present in the two top confinement layers, and each extending down to the vicinity of the active layer immediately therebeneath, to form a P-N junction therewith; two contact layers respectively disposed on the two top confinement layers; two contact deposits on said two contact layers; and a contact deposit on the substrate.
Claim 12
Independent Claim
298 words
A method of manufacturing a semiconductor structure, in particular a structure suitable for producing a laser effect, the method being characterized in that it comprises the following steps: (a) a monocrystaline double heterostructure stack is deposited on a substrate (S), said stack being constituted by active layers (CA) having different compositions and having light radiating properties, each of said layers being sandwiched between two confinement layers (CC) having a microcrystal lattice size adjacent to that of the active layers, with all of said layers having the same conductivity type; (b) the top of the stack is selectively etched in parallel strips which are adjacent to one another in order to lay bare confinement layers (CC) at different depths, at least on two adjacent strips, with the confinement layers (CC) thus laid bare defining parallel terraces (T1, T2, T3) separated from one another by transitions (M12, M23); (c) a contact layer (CP) is formed on said terraces; (d) an opposite conductivity type region (R1, R2, R3) is formed in the strip included in each terrace by inserting impurities through the contact layer, said impurities corresponding to the same conductivity type as the contact layer and said region extending through the top confinement layer (CC2, CC3, CC4) to the vicinity of the active layer therebeneath (CA1, CA2, CA3) in order to constitute a P-N junction therewith (J1, J2, J3); (e) individual metal contacts (DM1, DM2, DM3) are deposited on each opposite conductivity type region; (f) a common metal contact (DMS) is deposited on the substrate; (g) the opposite conductivity type regions are electrically isolated from one another (V10, V21, V32) at the transitions therebetween, in order to form semiconductor structure stripes; and (h) the opposite ends of said stripes are optically prepared transversely to the long dimension of the terraces.
Claim 13
Independent Claim
298 words
A method of manufacturing a semiconductor structure, in particular a structure suitable for producing a laser effect, the method being characterized in that it comprises the following steps: (a) a monocrystaline double heterostructure stack is deposited on a substrate (S), said stack being constituted by active layers (CA) having different compositions and having light radiating properties, each of said layers being sandwiched between two confinement layers (CC) having a microcrystal lattice size adjacent to that of the active layers, with all of said layers having the same conductivity type; (b) the top of the stack is selectively etched in parallel strips which are adjacent to one another in order to lay bare confinement layers (CC) at different depths, at least on two adjacent strips, with the confinement layers (CC) thus laid bare defining parallel terraces (T1, T2, T3) separated from one another by transitions (M12, M23); (c) a contact layer (CP) is formed on said terraces; (d) an opposite conductivity type region (R1, R2, R3) is formed in the strip included in each terrace by inserting impurities through the contact layer, said impurities corresponding to the same conductivity type as the contact layer and said region extending through the top confinement layer (CC2, CC3, CC4) to the vicinity of the active layer therebeneath (CA1, CA2, CA3) in order to constitute a P-N junction therewith (J1, J2, J3); (e) individual metal contacts (DM1, DM2, DM3) are deposited on each opposite conductivity type region; (f) a common metal contact (DMS) is deposited on the substrate; (g) the opposite conductivity type regions are electrically isolated from one another (V10, V21, V32) at the transitions therebetween, in order to form semiconductor structure stripes; and (h) the opposite ends of said stripes are optically prepared transversely to the long dimension of the terraces.
References Cited (Backward Citations)
US4754459A
Cited
US4722087A
Cited
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