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US4948742A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing a semiconductor device

Assignee: Mitsubishi Electric Corp
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Filing: 1989-11-20
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Granted: 1990-08-14
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Expires: 2009-11-20
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Abstract

Abstract Oxygen ions or nitrogen ions are implanted into a semiconductor substrate to form a dielectric layer in the semiconductor substrate. An epitaxial semiconductor layer of at least 2 μm in thickness, having excellent reproducibility and good crystallinity, is formed on a residual semiconductor layer on the dielectric layer by epitaxial growth, to serve as a region for forming semiconductor elements. Thus, a semiconductor device having high isolation breakdown voltage is impemented. Further, both oxygen ions and nitrogen ions are respectively implanted into a portions of a semiconductor substrate, which are adjacent to each other along the direction of thickness, to form two dielectric layers. Thus, a semiconductor device having higher isolation breakdown voltage is implemented.

Inventors

  • 👤 Tadashi Nishimura
  • 👤 Yoichi Akasaka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 19:54
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/208; H10P30/209; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1908; H10W; H10W10/00; H10W10/10; H10W10/181

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 127 words
A method of manufacturing a semiconductor device, comprising: (a) preparing a semiconductor substrate of a predetermined conductivity type; (b) implanting nitrogen ions into said semiconductor layer to form a first dielectric layer in a portion of predetermined depth in said semiconductor substrate, and then implanting oxygen ions into said semiconductor substrate to form a second dielectric layer which is adjacent to and is not overlapped with said first dielectric layer in the direction of depth, a portion of said semiconductor substrate on said first and second dielectric layers being defined as a residual semiconductor layer; (c) annealing said semiconductor substrate provided with said dielectric layer; and (d) forming an epitaxial semiconductor layer having a thickness greater than 2 μm on said residual semiconductor layer through epitaxial growth.
Claim 2
Independent Claim 127 words
A method of manufacturing a semiconductor device, comprising: (a) preparing a semiconductor substrate of a predetermined conductivity type; (b) implanting nitrogen ions into said semiconductor layer to form a first dielectric layer in a portion of predetermined depth in said semiconductor substrate, and then implanting oxygen ions into said semiconductor substrate to form a second dielectric layer which is adjacent to and is not overlapped with said first dielectric layer in the direction of depth, a portion of said semiconductor substrate on said first and second dielectric layers being defined as a residual semiconductor layer; (c) annealing said semiconductor substrate provided with said dielectric layer; and (d) forming an epitaxial semiconductor layer having a thickness greater than 2 μm on said residual semiconductor layer through epitaxial growth.
Claim 3
Dependent Claim 84 words
The method of manufacturing a semiconductor device in accordance with claim 1, wherein said step (d) includes the steps of; (d-1) implanting impurity ions of said predetermined conductivity type into said residual semiconductor layer and thereafter diffusing the same to set said residual semiconductor layer at first impurity concentration in said predetermined conductivity type, and (d-2) epitaxially growing said epitaxial semiconductor layer in second impurity concentration being lower than said first impurity concentration on said residual semiconductor layer set at said first impurity concentration.
Claim 4
Dependent Claim 41 words
The method of manufacturing a semiconductor device in accordance with claim 2, further including the step (e) of forming an element isolation region in said epitaxial semiconductor layer for isolating a plurality of semiconductor elements formed in said epitaxial semiconductor layer.
Claim 5
Dependent Claim 86 words
The method of manufacturing a semiconductor device in accordance with claim 3, wherein said step (e) includes the steps of; (e-1) forming a masking layer on said epitaxial semiconductor layer and opening a window in a portion of said masking layer corresponding to said element isolation region, (e-2) removing portions of said epitaxial semiconductor layer and said residual semiconductor layer located under said window of said masking layer, to form a groove reaching said dielectric layer, and (e-3) forming an element isolation part in said groove.
Claim 6
Dependent Claim 42 words
The method of manufacturing a semiconductor device in accordance with claim 4, wherein said masking layer is a silicon oxide layer, and said step (e-1) includes the step of opening said window by selectively removing said silicon oxide layer by photoengraving technique.
Claim 7
Dependent Claim 43 words
The method of manufacturing a semiconductor device in accordance with claim 4, wherein said step (e-2) includes the step of selective etching said epitaxial semiconductor layer and said residual semiconductor layer by using said masking layer provided with said window as a mask.
Claim 8
Dependent Claim 63 words
The method of manufacturing a semiconductor device in accordance with claim 4, wherein said step (e-3) includes the steps of; diffusing impurities of said predetermined conductivity type in a side surface of said groove to form a diffusion layer on the side surface of said groove; forming an insulation layer on said diffusion layer, and forming a polysilicon layer on said insulation layer.
Claim 9
Dependent Claim 25 words
The method of manufacturing a semiconductor device in accordance with claim 4, wherein an opening area of said groove is tapered toward said dielectric layer.
Claim 10
Dependent Claim 104 words
The method of manufacturing a semiconductor device in accordance with claim 4, wherein said step (e-3) includes the steps of: diffusing impurities of said predetermined conductivity type in a side surface of said groove to form a diffusion layer on the side surface of said groove; forming an insulation layer on said epitaxial semiconductor layer and said diffusion layer, forming a polysilicon layer on said insulation layer, in such thickness of filling up said groove provided on the side surface thereof with said insulation layer, and thinning said insulation layer and said polysilicon layer until a surface of said epitaxial semiconductor layer is exposed.
Claim 11
Dependent Claim 47 words
The method of manufacturing a semiconductor device in accordance with claim 9, wherein said step of thinning includes the steps of; performing mechanical polishing until the surface of said insulation layer is exposed, and performing chemical removal until the surface of said epitaxial semiconductor layer is exposed.
Claim 12
Dependent Claim 29 words
The method of manufacturing a semiconductor device in accordance with claim 1, wherein said semiconductor substrate is a silicon substrate, and said dielectric layer is a silicon oxide film.
Claim 13
Dependent Claim 29 words
The method of manufacturing a semiconductor device in accordance with claim 1, wherein said step (c) includes the step of annealing said semiconductor substrate at 1200° to 1400° C.
Claim 14
Dependent Claim 40 words
The method of manufacturing a semiconductor device in accordance with claim 1, wherein said step of implanting oxygen ions includes the step of implanting said oxygen ions into a region shallower portion of said semiconductor substrate than said predetermined depth.
Claim 15
Dependent Claim 38 words
The method of manufacturing a semiconductor device in accordance with claim 1, wherein said step of implanting nitrogen ions includes the step of implanting nitrogen ions by a value of 5×10 17 to 2×10 18 cm -2 .
Claim 16
Dependent Claim 38 words
The method of manufacturing a semiconductor device in accordance with claim 1, wherein said step of implanting oxygen ions includes the step of implanting oxygen ions by a value of 1.5×10 18 to 2.6×10 18 cm -2 .

References Cited (Backward Citations)

JPS5763841A Cited
JPS57211749A Cited
JPS58164239A Cited
JPS58155739A Cited
JPS61154141A Cited
US4676841A Cited
JPS62219562A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-08-13 1994-02-12 1994-08-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-08-13 1998-02-12 1998-08-14 $3760.00 Window Closed / Lapsed
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