US4947259A
Expired / Lapsed
US
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Image signal compressing device
Assignee: Sharp Corp
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Filing: 1988-07-20
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Granted: 1990-08-07
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Expires: 2008-07-20
Abstract
Abstract An image compressing device is described, which includes a circuit for dividing the binary signal into predetermined areas and for converting the binary signal into codes corresponding to predetermined patterns one for each predetermined area. It further includes a circuit for detecting a difference between the pattern corresponding to the code and the binary image signal, a multi-digit compressing circuit for compressing the code, and a binary compressing circuit for compressing the difference.
Inventors
- 👤 Yuji Katsuta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 14:18
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/41; H04N1/4105; H04N1/411; H04N1/413
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
69 words
An image compressing apparatus, comprising: means for dividing a binary image signal into predetermined areas and for converting the binary image signal into codes corresponding to predetermined patterns, one for each predetermined area, means for detecting a difference between the patterns corresponding to the codes and the binary image signal, for each predetermined area; multi-digit compressing means for compressing said codes; and binary compressing means for compressing said difference.
Claim 2
Dependent Claim
69 words
An image compressing apparatus, comprising: means for dividing a binary image signal into predetermined areas and for converting the binary image signal into codes corresponding to predetermined patterns, one for each predetermined area, means for detecting a difference between the patterns corresponding to the codes and the binary image signal, for each predetermined area; multi-digit compressing means for compressing said codes; and binary compressing means for compressing said difference.
Claim 3
Dependent Claim
107 words
An image compressing apparatus comprising: memory means for storing an input binary signal in predetermined areas; coding means for converting said input binary signal, stored in predetermined areas, into codes corresponding to predetermined patterns, one for each predetermined area; first comprising means, connected to said coding means, for compressing each of said codes; pattern generating means, connected to said coding means, for generating patterns corresponding to each of said codes; difference detecting means for detecting a difference between the input binary signal and said generated patterns, for each of said predetermined areas; second compressing means, connected to said difference means, for compressing each of said differences detected.
Claim 4
Dependent Claim
107 words
An image compressing apparatus comprising: memory means for storing an input binary signal in predetermined areas; coding means for converting said input binary signal, stored in predetermined areas, into codes corresponding to predetermined patterns, one for each predetermined area; first comprising means, connected to said coding means, for compressing each of said codes; pattern generating means, connected to said coding means, for generating patterns corresponding to each of said codes; difference detecting means for detecting a difference between the input binary signal and said generated patterns, for each of said predetermined areas; second compressing means, connected to said difference means, for compressing each of said differences detected.
Claim 5
Dependent Claim
16 words
An apparatus, as claimed in claim 2, wherein said pattern generating means generates dither matrix patterns.
Claim 6
Dependent Claim
17 words
An apparatus, as claimed in claim 2, wherein each first compressing means is a multi-digit compressing means.
Claim 7
Dependent Claim
15 words
An apparatus, as claimed in claim 2, wherein said predetermined areas are 4×8 bit areas.
Claim 8
Dependent Claim
25 words
An apparatus, as claimed in claim 5, wherein said pattern generating means generates 4×8 bit dither matrix patterns corresponding to each 4×8 bit predetermined area.
Claim 9
Dependent Claim
27 words
An apparatus, as claimed in claim 6, wherein said difference detecting means exclusively--ORs said input binary signal and said generated patterns, for each of said predetermined areas.
Claim 10
Independent Claim
85 words
A method for compressing an image comprising the steps of: (a) storing an input binary signal in predetermined areas; (b) converting said input binary signal stored in predetermined areas into codes corresponding to predetermined patterns, one for each predetermined area; (c) generating patterns corresponding to each of said codes; (d) detecting a difference between the input binary signal and said generated patterns, for each of said predetermined areas; (e) compressing each of said difference detected, and (f) compressing each of said codes of step (b).
Claim 11
Independent Claim
85 words
A method for compressing an image comprising the steps of: (a) storing an input binary signal in predetermined areas; (b) converting said input binary signal stored in predetermined areas into codes corresponding to predetermined patterns, one for each predetermined area; (c) generating patterns corresponding to each of said codes; (d) detecting a difference between the input binary signal and said generated patterns, for each of said predetermined areas; (e) compressing each of said difference detected, and (f) compressing each of said codes of step (b).
Claim 12
Dependent Claim
18 words
A method, as claimed in claim 8, wherein said patterns generated in step (c) are dither matrix patterns.
Claim 13
Dependent Claim
15 words
A method, as claimed in claim 9, wherein said predetermined areas are 4×8 bit areas.
Claim 14
Dependent Claim
31 words
A method, as claimed in claim 10, wherein said difference of step (d) is detected by exclusively--ORing said input binary signal and said generated patterns, for each of said predetermined areas.
References Cited (Backward Citations)
JPS54116822A
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JPS55105474A
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JPS574660A
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JPS5752281A
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JPS59161183A
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JPS60244160A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-08-06 | 1994-02-05 | 1994-08-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-08-06 | 1998-02-05 | 1998-08-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-08-06 | 2002-02-05 | 2002-08-07 | $7700.00 | Window Closed / Lapsed |