Digital signal translator having compensation for P-channel and N-channel threshold voltage shifts

Claim 2

A digital translator on a semiconductor chip that contains N-channel transistors and P-channel transistors which have threshold voltages that vary about respective nominal values; said translator including an input/output module which is made of said transistors and which receives a digital input signal having two input voltage levels and in response generates a digital output signal having two different output voltage levels; wherein to avoid shifts in said output voltage levels due to said threshold variations said translator further includes: a voltage generator means which produces a reference voltage and sends it to said input/output module; said generator including a circuit of said N-channel transistors and said P-channel transistors for varying said reference voltage in proportion to the threshold voltage of said N-channel transistors regardless of how the threshold voltage of said P-channel transistors varies; said input/output module including an output transistor which is one of said N-channel transistors; and, a means for coupling said reference voltage to said output transistor when said input signal is at one of said two input voltage levels and for otherwise coupling a fixed bias voltage thereto; said output transistor being adapted to produce said output signal by conducting in proportion to said reference voltage when that voltage is received, and by not conducting when said bias voltage is received.

Claim 3

A translator according to claim 1 wherein said voltage generator includes: a voltage divider means, containing one of said P-channel transistors and one of said N-channel transistors that are coupled in series with said reference voltage being produced at their serial coupling; and a control circuit means, that imposes a P-channel control signal on a gate of said N-channel transistor in said voltage divider which increases as the threshold voltage of said P-channel transistors decreases in magnitude, and that imposes an N-channel control signal on a gate of said P-channel transistor in said voltage divider which increases as the threshold voltage of said N-channel transistors decreases.

Claim 4

A translator according to claim 2 wherein said control circuit means includes a P-channel transistor and an N-channel transistor which are coupled in parallel through separate resistors at their drain, and which respectively generate said P-channel control signal and said N-channel control signal at their drain.

Claim 5

A translator according to claim 2 wherein said control circuit means includes a P-channel transistor, an N-channel transistor and a resistor which are coupled together in series, and which respectively generate said P-channel control signal and said N-channel control signal at their drain.

Claim 6

A translator according to claim 2 wherein said N-channel transistor in said input/output module has a gate which is coupled to receive said variable reference voltage through a P-channel transistor that turns on only when said input signal is at said one level.

Claim 7

A translator according to claim 5 wherein said voltage divider and said control circuit means are powered between two buses which respectively carry the same voltage levels as said input signal.

Claim 8

A digital translator on a semiconductor chip that contain N-channel transistors and P-channel transistors which have threshold voltages that vary about respective nominal values; said translator including an input/output module which is made of said transistors and which receives a digital input signal having two input voltage levels and in response generates a digital output signal having two different output voltage levels; wherein to avoid shifts in said output voltage levels due to said threshold variations said translator further includes: a voltage generator means which produces a reference voltage and sends it to said input/output module; said generator including a circuit of said N-channel transistors and said P-channel transistors for varying said reference voltage in inverse proportion to the magnitude of the threshold voltage of said P-channel transistors regardless of how the threshold voltage of said N-channel transistors varies; said input/output module including an output transistor which is one of said P-channel transistors; and, a means for coupling said reference voltage to said output transistor when said input signal is at one of said two input voltage levels and for otherwise coupling a fixed bias voltage thereto; said output transistor being adapted to produce said output signal by conducting in proportion to said reference voltage when that voltage is received, and by not conducting when said bias voltage is received.

Claim 9

A digital translator on a semiconductor chip that contain N-channel transistors and P-channel transistors which have threshold voltages that vary about respective nominal values; said translator including an input/output module which is made of said transistors and which receives a digital input signal having two input voltage levels and in response generates a digital output signal having two different output voltage levels; wherein to avoid shifts in said output voltage levels due to said threshold variations said translator further includes: a voltage generator means which produces a reference voltage and sends it to said input/output module; said generator including a circuit of said N-channel transistors and said P-channel transistors for varying said reference voltage in inverse proportion to the magnitude of the threshold voltage of said P-channel transistors regardless of how the threshold voltage of said N-channel transistors varies; said input/output module including an output transistor which is one of said P-channel transistors; and, a means for coupling said reference voltage to said output transistor when said input signal is at one of said two input voltage levels and for otherwise coupling a fixed bias voltage thereto; said output transistor being adapted to produce said output signal by conducting in proportion to said reference voltage when that voltage is received, and by not conducting when said bias voltage is received.

Claim 10

A translator according to claim 7 wherein said voltage generator includes: a voltage divider means, containing one of said P-channel transistors and one of said N-channel transistors that are coupled in series with said reference voltage being produced at their serial coupling; and a control circuit means, that imposes a P-channel control signal on a gate of said N-channel transistor in said voltage divider which increases as the threshold voltage of said P-channel transistors increases in magnitude, and that imposes an N-channel control signal on a gate of said P-channel transistor in said voltage divider which increases as the threshold voltage of said N-channel transistor increases.

Claim 11

A translator according to claim 8 wherein said control circuit means includes a P-channel transistor and an N-channel transistor which are coupled in parallel through separate resistors at their source, and which respectively generate said P-channel control signal and said N-channel control signal at their source.

Claim 12

A translator according to claim 8 wherein said control circuit means includes a resistor, a P-channel transistor, and an N-channel transistor which are coupled together in series, and which respectively generate said P-channel control signal and said N-channel control signal at their source.

Claim 13

On an integrated circuit chip that contains N-channel transistors and P-channel transistors which have threshold voltages that vary about respective nominal values, a reference voltage generator which is comprised of said transistors and which produces a reference voltage that varies in proportion to the threshold of said N-channel transistors regardless of how the threshold of said P-channel transistors varies; wherein said generator comprises: a voltage divider means, containing one of said P-channel transistors and one of said N-channel transistors that are coupled in series with each other; a control circuit means, which includes one of said P-channel transistors that generates a P-channel control signal whose magnitude varies in proportion to its threshold voltage, and one of said N-channel transistors that generates an N-channel control signal whose magnitude varies in proportion to its threshold voltage; said P-channel transistor of said voltage divider having a gate coupled to receive said N-channel control signal; said N-channel transistor of said voltage divider having a gate coupled to receive said P-channel control signal; and said reference voltage being produced at their serial coupling.

Claim 14

On an integrated circuit chip that contains N-channel transistors and P-channel transistors which have threshold voltages that vary about respective nominal values, a reference voltage generator which is comprised of said transistors and which produces a reference voltage that varies in proportion to the threshold of said N-channel transistors regardless of how the threshold of said P-channel transistors varies; wherein said generator comprises: a voltage divider means, containing one of said P-channel transistors and one of said N-channel transistors that are coupled in series with each other; a control circuit means, which includes one of said P-channel transistors that generates a P-channel control signal whose magnitude varies in proportion to its threshold voltage, and one of said N-channel transistors that generates an N-channel control signal whose magnitude varies in proportion to its threshold voltage; said P-channel transistor of said voltage divider having a gate coupled to receive said N-channel control signal; said N-channel transistor of said voltage divider having a gate coupled to receive said P-channel control signal; and said reference voltage being produced at their serial coupling.

Claim 15

On an integrated circuit chip that contains N-channel transistors and P-channel transistors which have threshold voltages that vary about respective nominal values, a reference voltage generator which is comprised of said transistors and which produces a reference voltage that varies in proportion to the threshold of said P-channel transistors regardless of how the threshold of said N-channel transistors varies; wherein said generator comprises: a voltage divider means, containing one of said P-channel transistors and one of said N-channel transistors that are coupled in series with each other; a control circuit means, which includes one of said P-channel transistors that generates a P-channel control signal whose magnitude varies inversely with its threshold voltage, and one of said N-channel transistors whose magnitude varies directly with its threshold voltage; said P-channel transistor of said voltage divider having a gate coupled to receive said N-channel control signal; said N-channel transistor of said voltage divider having a gate coupled to receive said P-channel control signal; and said reference voltage being produced at their serial coupling.

Claim 16

On an integrated circuit chip that contains N-channel transistors and P-channel transistors which have threshold voltages that vary about respective nominal values, a reference voltage generator which is comprised of said transistors and which produces a reference voltage that varies in proportion to the threshold of said P-channel transistors regardless of how the threshold of said N-channel transistors varies; wherein said generator comprises: a voltage divider means, containing one of said P-channel transistors and one of said N-channel transistors that are coupled in series with each other; a control circuit means, which includes one of said P-channel transistors that generates a P-channel control signal whose magnitude varies inversely with its threshold voltage, and one of said N-channel transistors whose magnitude varies directly with its threshold voltage; said P-channel transistor of said voltage divider having a gate coupled to receive said N-channel control signal; said N-channel transistor of said voltage divider having a gate coupled to receive said P-channel control signal; and said reference voltage being produced at their serial coupling.