US4942371A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Phase-locked loop having improved input jitter characteristics
Assignee: NEC Corp
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Filing: 1989-08-28
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Granted: 1990-07-17
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Expires: 2009-08-28
Abstract
Abstract In a phase-locked loop, a phase comparator, a low-pass filter, and a voltage-controlled oscillator are connected in a loop form. The phase-locked loop includes a switching circuit, arranged between the low-pass filter and the voltage-controlled oscillator, for switching an output signal from the phase comparator or an output signal from the low-pass filter to input the selected output signal to the voltage-controlled oscillator, and an input/output signal monitor circuit for controlling a switching timing of the switching circuit in response to a synchronization state between an input signal to the phase comparator and an output signal from the voltage-controlled oscillator, and in accordance with frequency components of the input signal.
Inventors
- 👤 Satoshi Kashiwaba
- 👤 Masahiro Nakajima
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 11:02
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/10; H03L7/107
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
106 words
A phase-locked loop in which a phase comparator, a low-pass filter, and a voltage-controlled oscillator are connected in a loop form, comprising: switching means, arranged between said low-pass filter and said voltage-controlled oscillator, for switching an output signal from said phase comparator or an output signal from said low-pass filter to input the selected output signal to said voltage-controlled oscillator; and input/output signal monitoring means for controlling a switching timing of said switching means in response to a synchronization stare between an input signal to said phase comparator and an output signal from said voltage-controlled oscillator, and in accordance with frequency components of said input signal.
Claim 2
Dependent Claim
106 words
A phase-locked loop in which a phase comparator, a low-pass filter, and a voltage-controlled oscillator are connected in a loop form, comprising: switching means, arranged between said low-pass filter and said voltage-controlled oscillator, for switching an output signal from said phase comparator or an output signal from said low-pass filter to input the selected output signal to said voltage-controlled oscillator; and input/output signal monitoring means for controlling a switching timing of said switching means in response to a synchronization stare between an input signal to said phase comparator and an output signal from said voltage-controlled oscillator, and in accordance with frequency components of said input signal.
Claim 3
Dependent Claim
172 words
A phase-locked loop (PLL) for establishing phase synchronization, comprising: a phase comparator for detecting a phase difference between an input signal and an output signal from a voltage-controlled oscillator; a first switching circuit for switching to an output a low-frequency signal component of a phase comparator output signal or said phase comparator output signal including a high-frequency signal component; a first switching control circuit for generating a switching control signal for said first switching circuit; a second switching circuit for selectively providing at an output the output signal from said first switching circuit or the low-frequency signal component of the phase comparator output signal in accordance with a synchronization/asynchronization state of said voltage-controlled oscillator and frequency components of the input signal; an input/output signal monitor circuit for monitoring the synchronization/asynchronization state of said voltage-controlled oscillator and the frequency components of the input signal to provide a control signal to said second switching circuit; and a circuit for controlling said voltage-controlled oscillator in accordance with the output signal from said second switching circuit.
Claim 4
Dependent Claim
172 words
A phase-locked loop (PLL) for establishing phase synchronization, comprising: a phase comparator for detecting a phase difference between an input signal and an output signal from a voltage-controlled oscillator; a first switching circuit for switching to an output a low-frequency signal component of a phase comparator output signal or said phase comparator output signal including a high-frequency signal component; a first switching control circuit for generating a switching control signal for said first switching circuit; a second switching circuit for selectively providing at an output the output signal from said first switching circuit or the low-frequency signal component of the phase comparator output signal in accordance with a synchronization/asynchronization state of said voltage-controlled oscillator and frequency components of the input signal; an input/output signal monitor circuit for monitoring the synchronization/asynchronization state of said voltage-controlled oscillator and the frequency components of the input signal to provide a control signal to said second switching circuit; and a circuit for controlling said voltage-controlled oscillator in accordance with the output signal from said second switching circuit.
Claim 5
Independent Claim
91 words
A method for establishing phase synchronization in a phase-locked loop (PLL), including phase comparator means, low-pass filter means, and a voltage-controlled oscillator, comprising: detecting a phase difference between an input signal and an output signal from said voltage-controlled oscillator; extracting a low-frequency signal component from the detection result; selecting one of the detection result and the low-frequency signal component; and providing to said voltage controlled oscillator the selection result or the low-frequency signal component in accordance with a synchronization/asynchronization state of said voltage-controlled oscillator and frequency components of the input signal.
Claim 6
Independent Claim
91 words
A method for establishing phase synchronization in a phase-locked loop (PLL), including phase comparator means, low-pass filter means, and a voltage-controlled oscillator, comprising: detecting a phase difference between an input signal and an output signal from said voltage-controlled oscillator; extracting a low-frequency signal component from the detection result; selecting one of the detection result and the low-frequency signal component; and providing to said voltage controlled oscillator the selection result or the low-frequency signal component in accordance with a synchronization/asynchronization state of said voltage-controlled oscillator and frequency components of the input signal.
References Cited (Backward Citations)
US4007429A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-07-16 | 1994-01-15 | 1994-07-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-07-16 | 1998-01-15 | 1998-07-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-07-16 | 2002-01-15 | 2002-07-17 | $7700.00 | Window Closed / Lapsed |