Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
205 words
A differential encoder comprising: a prediction loop circuit, a comparator having an additive input and a subtractive input and generating on an output an error signal and receiving, on said additive input, successive samples of an input signal to be encoded and, on said subtractive input, an estimated signal delivered by said prediction loop circuit which receives the error signal from the output of the comparator, said prediction loop circuit comprising a self-adaptive predictive filter receiving said error signal from the output of said comparator, a gain control circuit, and a multiplier which receives that output of the predictive filter and of the gain control circuit and generates an output which is connected to said subtractive input of said comparator, wherein said self-adaptive predictive filter comprises a plurality of parallel channels assigned to different mutually adjacent spectral bands, and a common summer, each channel comprising an input pass-band filter, a quadratic detector fed by said pass-band filter, a multiplier, and a peak detector whose input is connected to the quadratic detector and whose output is applied to said multiplier which also receives the output signal from the respective pass-band filter, the outputs of the multipliers of each channel connected to and driving said common summer.
Claim 2
Dependent Claim
205 words
A differential encoder comprising: a prediction loop circuit, a comparator having an additive input and a subtractive input and generating on an output an error signal and receiving, on said additive input, successive samples of an input signal to be encoded and, on said subtractive input, an estimated signal delivered by said prediction loop circuit which receives the error signal from the output of the comparator, said prediction loop circuit comprising a self-adaptive predictive filter receiving said error signal from the output of said comparator, a gain control circuit, and a multiplier which receives that output of the predictive filter and of the gain control circuit and generates an output which is connected to said subtractive input of said comparator, wherein said self-adaptive predictive filter comprises a plurality of parallel channels assigned to different mutually adjacent spectral bands, and a common summer, each channel comprising an input pass-band filter, a quadratic detector fed by said pass-band filter, a multiplier, and a peak detector whose input is connected to the quadratic detector and whose output is applied to said multiplier which also receives the output signal from the respective pass-band filter, the outputs of the multipliers of each channel connected to and driving said common summer.
Claim 3
Dependent Claim
71 words
The differential encoder according to claim 1, wherein the comparator is arranged for delivering a constant level output signal having plus or minus polarity and wherein said encoder further comprises a circuit receiving the output signal from the comparator and transforming said output signal into a binary code which is sent on the line, the output of the encoder having one bit per input sample of the signal to be encoded.
Claim 4
Dependent Claim
42 words
The differential encoder according to claim 2, wherein each of said channels further comprises a circuit for subtracting an adjustable value from the output signal of the quadratic detector, said subtracting circuit being located between the quadratic detector and the peak detector.
Claim 5
Dependent Claim
42 words
The differential encoder according to claim 3, wherein said adjustable value is different according to the channel and has a magnitude which is higher for the channels having spectral bands of higher frequencies, whereby the predictibility is enhanced for the higher frequencies.
Claim 6
Dependent Claim
47 words
The differential encoder according to claim 1, connected to receive a speech signal to be encoded, wherein the pass-band filters have band widths which are higher for the higher frequencies or have a constant width and wherein the number of channels is comprised between 8 and 16.
Claim 7
Dependent Claim
152 words
The differential encoder according to claim 1, wherein the peak detector is constructed to operate according to the algorithm: if SCi n <((SFi.sub.(n)) 2 -Vi), then SCi n is adjusted at the level SCi.sub.(n-1) +di((SFi.sub.(n)) 2 -Vi); if SCi.sub.(n) ≧((SFi.sub.(n)) 2 -Vi) for more than Mi successive samples, then SCi.sub.(n) is adjusted at level ci.(SCi.sub.(n-1)); if SCi.sub.(n) ≧((SFi.sub.(n)) 2 -Vi) for less than Mi successive samples, then SCi.sub.(n) is kept at level SCi.sub.(n-1) ; wherein SCi.sub.(n) designates the output of the peak detector, the terms on the right side of the above-identified equations designating the signal applied to the input of the peak detector, Mi designates a predetermined number higher than 1 and ci and di designate coefficients smaller than 1, SFi.sub.(n) designates the frequency response law for the pass-band filter of the ith channel, and Vi a constant value depending on the rank of the pass-band filter of the ith channel.
Claim 8
Dependent Claim
168 words
The differential encoder according to claim 1, wherein the gain control circuit is contructed to operate according to an adaptation algorithm responsive to a sequence of values Δ(n) successively present at the input thereof, where n designates the present value S.sub.(n) at said input, said algorithm being represented by the following criteria: if four identical values appear at the output of the comparator as indicated by the expression: Δ(n)=Δ(n-1)=Δ(n-2)=Δ(n-3), the transmission gain G.sub.(n) of the gain control circuit is increased, by multiplying it by a factor α1 greater than 1; if there are only three identical values which follow each other as indicated by the expression: Δ(n)=Δ(n-1)=Δ(n-2)=Δ(n-3), the gain G.sub.(n) is increased, by multiplying it by a factor α2 greater than 1 but less than α1: if three successive alternations occur as indicated by the expression: Δ(n)=Δ(n-1)=Δ(n-2)=Δ(n-3), the gain G.sub.(n) is decreased, by multiplying it by a coefficient α3 lesser than 1; in all other cases, G.sub.(n) is decreased, by multiplying it by a coefficient α4, with α3<α4<1.
Claim 9
Dependent Claim
36 words
The differential encoder according to claim 7, wherein, responsive to said three successive alternations, the gain of said gain control circuit is decreased by multiplying it by a coefficient α3-k.G(n-1) where k is a constant value.
Claim 10
Dependent Claim
314 words
A differential encoder-decoder system comprising an encoder for generating an encoded signal and a decoder for decoding said encoded signal said differential encoder comprising: a prediction loop circuit, a comparator having an additive input and a subtractive input and generating on an output an error signal and receiving, on said additive input, successive samples of an input signal to be encoded and, on said subtractive input, an estimated signal delivered by said prediction loop circuit which receives the error signal from the output of the comparator, said prediction loop circuit comprising a self-adaptive predictive filter receiving said error signal from the output of said comparator, a gain control circuit, and a multiplier which receives the output of the predictive filter and of the gain control circuit and generates an output which is connected to said substractive input of said comparator, wherein said self-adaptive predictive filter comprises a plurality of parallel channels assigned to different mutually adjacent spectral bands, and a common summer, each channel comprising an input pass-band filter, a quadratic detector fed by said pass-band filter, a multiplier, and a peak detector whose input is connected to the quadratic detector and whose output is applied to said multiplier which also receives the output signal from the respective pass-band filter, the outputs of the multipliers of each channel connected to and driving said common summer, said decoder comprising a predictor filter identical to the predictor circuit of the encoder for receiving said encoded signal, a delay circuit, a computing unit for computing the reception gain and a multiplier connected to receive the reception gain delivered by said computing unit on one input and the filtered signal from the output of the predictor filter on another input through said delay circuit having a transmit time equal to the time interval between two successive samples of the encoded signal received by said predictor of said decoder.
Claim 11
Dependent Claim
314 words
A differential encoder-decoder system comprising an encoder for generating an encoded signal and a decoder for decoding said encoded signal said differential encoder comprising: a prediction loop circuit, a comparator having an additive input and a subtractive input and generating on an output an error signal and receiving, on said additive input, successive samples of an input signal to be encoded and, on said subtractive input, an estimated signal delivered by said prediction loop circuit which receives the error signal from the output of the comparator, said prediction loop circuit comprising a self-adaptive predictive filter receiving said error signal from the output of said comparator, a gain control circuit, and a multiplier which receives the output of the predictive filter and of the gain control circuit and generates an output which is connected to said substractive input of said comparator, wherein said self-adaptive predictive filter comprises a plurality of parallel channels assigned to different mutually adjacent spectral bands, and a common summer, each channel comprising an input pass-band filter, a quadratic detector fed by said pass-band filter, a multiplier, and a peak detector whose input is connected to the quadratic detector and whose output is applied to said multiplier which also receives the output signal from the respective pass-band filter, the outputs of the multipliers of each channel connected to and driving said common summer, said decoder comprising a predictor filter identical to the predictor circuit of the encoder for receiving said encoded signal, a delay circuit, a computing unit for computing the reception gain and a multiplier connected to receive the reception gain delivered by said computing unit on one input and the filtered signal from the output of the predictor filter on another input through said delay circuit having a transmit time equal to the time interval between two successive samples of the encoded signal received by said predictor of said decoder.
Claim 12
Dependent Claim
66 words
The differential encoder-decoder system according to claim 9, wherein the multiplier of said decoder is arranged for providing a mean reception gain equal to GM(n-1)=α7.G(n-2)+α6.G(n-1)+α5.G(n) where GM(n-1) designates a mean reception gain for the value S(n-1) of said input signal to be encoded and G(n-2), G(n-1) designate the transmission gain for corresponding values S(n-2) and S(n-1) respectively, of said input signal to be encoded, with α5+α6+α7=1.
Claim 13
Dependent Claim
92 words
The differential encoder-decoder system according to claim 10, wherein said decoder further comprises an output adder which receives a predictive reception signal delivered by the multiplier and three values which respectively represent: the value of Δ(n) weighted by multiplication by a fixed coefficient α0 and multiplied by the reception gain GM(n-1) delivered by said computing unit; the value of Δ(n-1) weighted by multiplication by a fixed coefficient α1 and multiplied by the gain GM(n-1), the value of Δ(n-2) weighted by multiplication by a fixed coefficient α2 and multiplied by the gain GM(n-1).