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US4937639A Expired / Lapsed US ⏱️ 0.0 years remaining

Input protector device for semiconductor device

Assignee: Nissan Motor Co Ltd
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Filing: 1988-10-14
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Granted: 1990-06-26
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Expires: 2008-10-14
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Abstract

Abstract An input protector device for a semiconductor device such as a CMOS device, in which a first resistor is formed on an insulating film of a semiconductor substrate, and a second resistor is formed of an impurity diffusion region in the substrate, the first and second resistors and a capacitor being coupled to one another in series to constitute a filter circuit, and in which first and second diodes each cooperated with at least one of the first and second resistors, by-passing noises having low and high voltages, respectively, and a high frequency noise is cut by the filter circuit, thereby effectively preventing latchup.

Inventors

  • 👤 Kenji Yao
  • 👤 Teruyoshi Mihara
  • 👤 Noriyuki Abe
  • 👤 Tsutomu Matsushita

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 09:04
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/854; H10D84/90; H10D84/998

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 182 words
An input protector device for a semiconductor device, comprising: a semiconductor substrate of a first conductivity type, having an insulating film on a surface thereof; a first resistor formed on the insulating film and connected to an input terminal; a second resistor of an impurity diffusion region formed in the substrate and connected to an output, the first and second resistors being coupled in series between the input and output terminal; a capacitor formed in a surface area of the substrate and connected to the output terminal, the capacitor and the first and second resistors constituting a first device for by-passing high frequency noise; a first diode coupled to the connection point between the first and second resistors, the first diode and the first resistor constituting a second device for by-passing one of a low voltage noise and a high voltage noise; and a second diode formed in the substrate to integrally connect to the second resistor, the second diode and the first and second resistors constituting a third device for by-passing the other one of the low and high voltage noises.
Claim 2
Dependent Claim 182 words
An input protector device for a semiconductor device, comprising: a semiconductor substrate of a first conductivity type, having an insulating film on a surface thereof; a first resistor formed on the insulating film and connected to an input terminal; a second resistor of an impurity diffusion region formed in the substrate and connected to an output, the first and second resistors being coupled in series between the input and output terminal; a capacitor formed in a surface area of the substrate and connected to the output terminal, the capacitor and the first and second resistors constituting a first device for by-passing high frequency noise; a first diode coupled to the connection point between the first and second resistors, the first diode and the first resistor constituting a second device for by-passing one of a low voltage noise and a high voltage noise; and a second diode formed in the substrate to integrally connect to the second resistor, the second diode and the first and second resistors constituting a third device for by-passing the other one of the low and high voltage noises.
Claim 3
Dependent Claim 38 words
The device of claim 1, also including a third diode connected to the connection point between the first and second resistors, the third diode and the first resistor constituting a forth device for by-passing the high voltage noise.
Claim 4
Dependent Claim 12 words
The device of claim 1, wherein the first resistor comprises polycrystalline silicon.
Claim 5
Dependent Claim 26 words
The device of claim 1, wherein the second resistor comprises a high resistance diffusion region of a second conductivity type opposite to the first conductivity type.
Claim 6
Dependent Claim 24 words
The device of claim 1, wherein the first diode comprises a PN junction between a P-type well region and an N + -type region.
Claim 7
Dependent Claim 14 words
The device of claim 1, wherein the first diode comprises a polycrystalline silicon diode.
Claim 8
Dependent Claim 23 words
The device of claim 1, wherein the first diode comprises a PN junction between a P-type well region and N-type channel stopper region.
Claim 9
Dependent Claim 21 words
The device of claim 1, wherein the second diode comprises a PN junction of a P-type well region and N-type substrate.
Claim 10
Dependent Claim 14 words
The device of claim 2, wherein the third diode comprises a polycrystalline silicon diode.
Claim 11
Dependent Claim 23 words
The device of claim 1, wherein the first resistor and the first diode are integrally coupled to each other and comprise polycrystalline silicon.
Claim 12
Dependent Claim 30 words
The device of claim 1, wherein the capacitor comprises N-type diffusion region formed in the surface area of the substrate, a polycrystalline silicon film and an insulating film placed therebetween.

References Cited (Backward Citations)

US4288829A Cited
JPS54101283A Cited
JPS5591173A Cited
JPS5873160A Cited
US4777518A Cited
JPS59111356A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-06-25 1993-12-25 1994-06-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-06-25 1997-12-25 1998-06-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-06-25 2001-12-25 2002-06-26 $7700.00 Window Closed / Lapsed

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