US4937468A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Isolation circuit for pulse waveforms
Assignee: Sundstrand Corp
•
Filing: 1989-01-09
•
Granted: 1990-06-26
•
Expires: 2009-01-09
Abstract
Abstract A load is controlled by a pulse waveform from a source. The source and load are electrically isolated by using two monostable circuits to detect the leading and trailing edge of the pulse waveform, two pulse transformers to isolate the source and the load, and a bistable circuit to reconstruct the original pulse waveform.
Inventors
- 👤 Sampat S. Shekhawat
- 👤 P. John Dhyanchand
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 08:02
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/605; H03K17/61; H03K17/66; H03K17/665; H03K17/666; H03K17/667
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
179 words
An isolation circuit for coupling a pulse waveform having a leading edge and a trailing edge from a source to a load, comprising: first and second monostable circuits connected with said source, the first monostable circuit producing a pulse output in response to the leading edge of said waveform, and the second monostable circuit producing a pulse output in response to the trailing edge of said waveform; first and second pulse transformers, each with a primary and secondary winding, the primary winding of the one of two transformers being connected to the output of the first monostable circuit, and the primary winding of the other pulse transformer being connected to the output of the second monostable circuit; a bistable circuit which has a set input and a reset input, wherein the set input is connected to the secondary winding of one of two pulse transformers, and the reset input is connected to the secondary winding of the other pulse transformer, whereby the output of the bistable circuit reproduces the pulse waveform from said source, for coupling to said load.
Claim 2
Dependent Claim
179 words
An isolation circuit for coupling a pulse waveform having a leading edge and a trailing edge from a source to a load, comprising: first and second monostable circuits connected with said source, the first monostable circuit producing a pulse output in response to the leading edge of said waveform, and the second monostable circuit producing a pulse output in response to the trailing edge of said waveform; first and second pulse transformers, each with a primary and secondary winding, the primary winding of the one of two transformers being connected to the output of the first monostable circuit, and the primary winding of the other pulse transformer being connected to the output of the second monostable circuit; a bistable circuit which has a set input and a reset input, wherein the set input is connected to the secondary winding of one of two pulse transformers, and the reset input is connected to the secondary winding of the other pulse transformer, whereby the output of the bistable circuit reproduces the pulse waveform from said source, for coupling to said load.
Claim 3
Dependent Claim
19 words
The isolation circuit of claim 1 including transistors coupling each of the monostable circuits to the respective pulse transformer.
Claim 4
Dependent Claim
14 words
The isolation circuit of claim 1 wherein the bistable circuit is an RS flip-flop.
Claim 5
Dependent Claim
26 words
The isolation circuit of claim 1 in which the pulse outputs of the monostable circuits have a duration less than the duration of the pulse waveform.
Claim 6
Dependent Claim
197 words
An isolation circuit to be used in an inverter for coupling a pulse width modulated (PWM) control signal to two inverter power switches, comprising: first and second monostable circuits connected to the PWM control signal, the first monostable circuit producing a pulse output in response to the leading edge of the PWM signal, and the second monostable circuit producing a pulse output in response to the trailing edge of said PWM signal; first and second pulse transformers, each with a primary and secondary winding, the primary winding of the first pulse transformer being connected to the output of the first monostable circuit, and the primary winding of the second pulse transformer being connected to the output of the second monostable circuit; a bistable circuit which has a set input and a reset input, wherein the set input is connected to the secondary winding of one of two pulse transformers, and the reset input is connected to the secondary winding of the other pulse transformer, whereby the output of the bistable circuit reproduces the PWM signal to control one of said inverter switches and the inverse of the output of the bistable circuit controls the other inverter switch.
Claim 7
Dependent Claim
197 words
An isolation circuit to be used in an inverter for coupling a pulse width modulated (PWM) control signal to two inverter power switches, comprising: first and second monostable circuits connected to the PWM control signal, the first monostable circuit producing a pulse output in response to the leading edge of the PWM signal, and the second monostable circuit producing a pulse output in response to the trailing edge of said PWM signal; first and second pulse transformers, each with a primary and secondary winding, the primary winding of the first pulse transformer being connected to the output of the first monostable circuit, and the primary winding of the second pulse transformer being connected to the output of the second monostable circuit; a bistable circuit which has a set input and a reset input, wherein the set input is connected to the secondary winding of one of two pulse transformers, and the reset input is connected to the secondary winding of the other pulse transformer, whereby the output of the bistable circuit reproduces the PWM signal to control one of said inverter switches and the inverse of the output of the bistable circuit controls the other inverter switch.
Claim 8
Dependent Claim
38 words
The isolation circuit of claim 5 in which the PWM control signal has a duration on the order of 65 microseconds, and the pulse outputs of the monostable circuits have a duration on the order of 2 microseconds.
References Cited (Backward Citations)
US3942042A
Cited
US4021685A
Cited
US4466052A
Cited
GB2123225A
Cited
US4495554A
Cited
US4694206A
Cited
US4565931A
Cited
US4710645A
Cited
US4683528A
Cited
US4716513A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-06-25 | 1993-12-25 | 1994-06-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-06-25 | 1997-12-25 | 1998-06-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-06-25 | 2001-12-25 | 2002-06-26 | $7700.00 | Window Closed / Lapsed |