Common-mode feedback bias generator for operational amplifiers

Claim 2

A common-mode feedback circuit for use in a fully differential operation amplifier comprising: circuitry to generate a first signal corresponding to a desired common-mode voltage; circuitry to generate a second signal corresponding to the common-mode operating point of the output of the fully differential operational amplifier; and circuitry to adjust the common-mode operating point of the output of the fully differential operational amplifier based on a comparison of said first and second signals, wherein said circuitry to generate a second signal comprises circuitry to provide a variable current responsive to the common-mode operating point of the output of the fully differential operational amplifier.

Claim 3

A common-mode feedback circuit for use in a fully differential operational amplifier comprising: circuitry to generate a first signal corresponding to a desired common-mode voltage; circuitry to generate a second signal corresponding to the common-mode operating point of the output of the fully differential operational amplifier; and circuitry to adjust the common-mode operating point of the output of the fully differential operational amplifier based on a comparison of said first and second signals, wherein said circuitry to generate a second signal comprises circuitry to provide a variable resistance responsive to the common-mode operating point of the output of the fully differential operational amplifier.

Claim 4

A common-mode feedback circuit for use in a fully differential operational amplifier comprising: circuitry to generate a first signal corresponding to a desired common-mode voltage; circuitry to generate a second signal corresponding to the common-mode operating point of the output of the fully differential operational amplifier; and circuitry to adjust the common-mode operating point of the output of the fully differential operational amplifier based on a comparison of said first and second signals, wherein said circuitry to generate a second signal comprises circuitry to provide a variable resistance responsive to the common-mode operating point of the output of the fully differential operational amplifier.

Claim 5

The common-mode feedback circuit of claim 2 wherein said circuit to provide a variable resistance comprises a MOS transistor pair having gates connected to the differential output of the fully differential operational amplifier.

Claim 6

The common-mode feedback circuit of claim 3 and further comprising circuitry to maintain the source-drain voltage of said transistor pair such that the current characteristics of the transistor pair remains in the ohmic region.

Claim 7

An operational amplifier comprising: differential amplifier circuitry including input nodes for receiving a differential input and output circuitry connected to said input nodes for providing a differential output signal to first and second output nodes responsive to said differential input; detection circuitry connected to said differential amplifier circuitry for producing a first signal corresponding to the common-mode operating point of said differential output signal, said detection circuitry comprising a variable conductance element responsive to the common-mode operating point of said output circuitry; reference circuitry connected to said detection circuitry for providing a second signal corresponding to a desired common-mode operating point having a well known relationship with said first signal; and compare circuitry for providing a third signal to said output circuitry for indicating a mismatch between said first and second signals.

Claim 8

An operational amplifier comprising: differential amplifier circuitry including input nodes for receiving a differential input and output circuitry connected to said input nodes for providing a differential output signal to first and second output nodes responsive to said differential input; detection circuitry connected to said differential amplifier circuitry for producing a first signal corresponding to the common-mode operating point of said differential output signal, said detection circuitry comprising a variable conductance element responsive to the common-mode operating point of said output circuitry; reference circuitry connected to said detection circuitry for providing a second signal corresponding to a desired common-mode operating point having a well known relationship with said first signal; and compare circuitry for providing a third signal to said output circuitry for indicating a mismatch between said first and second signals.

Claim 9

The operational amplifier of claim 5 wherein said variable conductance element comprises two MOS transistors having respective sources and drains connected together and gates connected to the differential output signals.

Claim 10

An operational amplifier comprising: differential amplifier circuitry including input nodes for receiving a differential input and output circuitry connected to said input nodes for providing a differential output signal to first and second output nodes responsive to said differential input; detection circuitry connected to said differential amplifier circuitry for producing a first signal corresponding to the common-mode operating point of said differential output signal; reference circuitry connected to said detection circuitry providing a second signal corresponding to a desired common-mode operating point having a known relationship with said first signal; and compare circuitry for providing a third signal to said output circuitry for indicating a mismatch between said first and second signals, said differential amplifier circuitry including load circuitry comprising a pair of MOS transistors having respective first source/drains connected to a predetermined voltage, respective second source/drain connected to said output nodes and gates connected to said compare circuitry.

Claim 11

An operational amplifier comprising: differential amplifier circuitry including input nodes for receiving a differential input and output circuitry connected to said input nodes for providing a differential output signal to first and second output nodes responsive to said differential input; detection circuitry connected to said differential amplifier circuitry for producing a first signal corresponding to the common-mode operating point of said differential output signal; reference circuitry connected to said detection circuitry providing a second signal corresponding to a desired common-mode operating point having a known relationship with said first signal; and compare circuitry for providing a third signal to said output circuitry for indicating a mismatch between said first and second signals, said differential amplifier circuitry including load circuitry comprising a pair of MOS transistors having respective first source/drains connected to a predetermined voltage, respective second source/drain connected to said output nodes and gates connected to said compare circuitry.

Claim 12

The operational amplifier of claim 7 wherein said compare circuitry comprises: current bias circuitry for generating a bias current; adjust circuitry for varying said bias current response to said first and second signals; and bias voltage circuitry for generating a bias voltage for driving the gates of said MOS transistor, said bias voltage response to said bias current.

Claim 13

The operational amplifier of claim 8 wherein said compare circuitry comprises circuitry to adjust said predetermined current responsive to said mismatch between said first and second signals.

Claim 14

The operational amplifier of claim 7 wherein said third signal drives the gates of said MOS transistors.

Claim 19

The method of claim 12 wherein said step of varying a resistance comprises the step of driving the gates of a pair of MOS transistors with the differential output of the fully differential operational amplifier.