US4932073A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transmitter having PLL circuit
Assignee: NEC Corp
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Filing: 1989-01-19
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Granted: 1990-06-05
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Expires: 2009-01-19
Abstract
Abstract A transmitter includes a phase-locked loop (PLL) circuit whose output is frequency modulated with a modulation signal. The modulated signal is amplified by an amplifier which is turned on only during a signal transmission of the transmitter. At a time when the amplifier is turned, the output frequency of PLL circuit fluctuates. To depress this frequency fluctuation, the transmitter includes a frequency fluctuation depressing (FFD) circuit. Upon the turning-on of the amplifier, FFD circuit applies a voltage change to the modulation signal so that the frequency fluctuation is depressed.
Inventors
- 👤 Hideki Ueda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 10:43
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/02; H04B1/04; H03; H03L; H03L3/00; H03L7/00; H03L7/06; H03L7/08; H03L7/14; H03B; H03B5/00; H03B5/02; H03B5/04; H03C; H03C3/00; H03C3/02; H03C3/09; H03C3/0908
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
94 words
A transmitter comprising: phase-locked loop (PLL) circuit means for producing an oscillation signal, the frequency of said oscillation signal varying with a control signal; amplifier means connected to the output of said PLL circuit means for amplifying said output; switch means for turning on and off said amplifier means; and frequency fluctuation depressing means connected to said PLL circuit means and said switch means for depressing frequency fluctuation in the output of said PLL circuit means by changing the voltage of said control signal at a time when said amplifier means is turned on.
Claim 2
Dependent Claim
94 words
A transmitter comprising: phase-locked loop (PLL) circuit means for producing an oscillation signal, the frequency of said oscillation signal varying with a control signal; amplifier means connected to the output of said PLL circuit means for amplifying said output; switch means for turning on and off said amplifier means; and frequency fluctuation depressing means connected to said PLL circuit means and said switch means for depressing frequency fluctuation in the output of said PLL circuit means by changing the voltage of said control signal at a time when said amplifier means is turned on.
Claim 3
Dependent Claim
89 words
A transmitter as claimed in claim 1 further comprising power supply means, and wherein said frequency fluctuation depressing means comprises capacitor means, one terminal of said capacitor means being connected to said PLL circuit means; diode means, an anode of said diode means being connected to the other terminal of said capacitor; first resistor means connected between said power supply means and the connection of said anode and the other terminal of said capacitor; and second resistor means connected between a cathode of said diode and said switch means.
Claim 4
Dependent Claim
88 words
A transmitter as claimed in claim 1, wherein said PLL circuit means comprises voltage-controlled oscillator (VCO) means for producing said oscillation signal, said VCO means changing the frequency of said oscillation signal in response to said control signal and to a phase error signal; phase detector means responsive to the output of said VCO means and to a reference oscillation signal for comparing their phases to produce said phase error signal; and means for supplying said phase error signal from said phase detector means to said VCO means.
Claim 5
Dependent Claim
113 words
A transmitter comprising: oscillator means for providing an oscillation signal, the frequency of said oscillation signal being changed in response to a voltage change in a modulation signal; amplifier means connected to the output of said oscillator means for amplifying said oscillation signal; power supply means for supplying power to said oscillator means and said amplifier means, the beginning of power supply to said amplifier means causing fluctuation in the frequency of said oscillation signal; and frequency fluctuation depressing means responsive to the beginning of power supply to said amplifier means for changing the voltage of said modulation signal so that said fluctuation in the frequency of said oscillation signal can be depressed.
Claim 6
Dependent Claim
113 words
A transmitter comprising: oscillator means for providing an oscillation signal, the frequency of said oscillation signal being changed in response to a voltage change in a modulation signal; amplifier means connected to the output of said oscillator means for amplifying said oscillation signal; power supply means for supplying power to said oscillator means and said amplifier means, the beginning of power supply to said amplifier means causing fluctuation in the frequency of said oscillation signal; and frequency fluctuation depressing means responsive to the beginning of power supply to said amplifier means for changing the voltage of said modulation signal so that said fluctuation in the frequency of said oscillation signal can be depressed.
Claim 7
Dependent Claim
60 words
A transmitter as claimed in claim 4, wherein said oscillator means comprises phase-locked loop circuit means including: reference oscillator means for producing a reference signal; phase detector means for comparing the phases of said reference and oscillation signals to provide an error signal; and voltage-controlled oscillator means for producing said oscillation signal in response to said modulation and error signals.
Claim 8
Dependent Claim
27 words
A transmitter as claimed in claim 4 further comprising switch means responsive to a control signal for switching on and off power supply to said amplifier means.
Claim 9
Dependent Claim
66 words
A transmitter as claimed in claim 6, wherein said frequency fluctuation depressing means comprises first resistor means receiving said control signal; diode means connected in series with said first resistor means; capacitor means connected in series with said diode means and receiving said modulation signal; and second resistor means connected between said power supply means and the junction of said diode means and said capacitor means.
Claim 10
Dependent Claim
101 words
A transmitter comprising: a phase-locked loop circuit for supplying a modulated output signal; an amplifier for amplifying the output of said phase-locked loop circuit to a predetermined level, the impedance of said amplifier changing with the application of power thereto causing the frequency of said modulated output signal to change in a first direction; and a frequency fluctuation depressing circuit responsive to the start of power supply to said amplifier for causing said phase-locked loop circuit to change its output frequency in a reverse direction of frequency change from that which is due to the onset of power to said amplifier.
Claim 11
Dependent Claim
101 words
A transmitter comprising: a phase-locked loop circuit for supplying a modulated output signal; an amplifier for amplifying the output of said phase-locked loop circuit to a predetermined level, the impedance of said amplifier changing with the application of power thereto causing the frequency of said modulated output signal to change in a first direction; and a frequency fluctuation depressing circuit responsive to the start of power supply to said amplifier for causing said phase-locked loop circuit to change its output frequency in a reverse direction of frequency change from that which is due to the onset of power to said amplifier.
Claim 12
Independent Claim
77 words
A method of depressing frequency fluctuation in the output of a phase-locked loop (PLL) circuit, said fluctuation being caused by the turning-on of an amplifier connected to the output of said PLL circuit, said method comprising the following steps of: providing an output from said PLL circuit which has been modulated with a modulating signal; and responsive to the turning-on of said amplifier, changing the voltage of said modulation signal so that said fluctuation can be depressed.
Claim 13
Independent Claim
77 words
A method of depressing frequency fluctuation in the output of a phase-locked loop (PLL) circuit, said fluctuation being caused by the turning-on of an amplifier connected to the output of said PLL circuit, said method comprising the following steps of: providing an output from said PLL circuit which has been modulated with a modulating signal; and responsive to the turning-on of said amplifier, changing the voltage of said modulation signal so that said fluctuation can be depressed.
Claim 14
Independent Claim
94 words
A method of depressing frequency fluctuation in the output of an oscillator circuit, comprising the following steps of: generating an oscillation signal with said oscillator circuit, the frequency of said oscillation signal being changed in response to a voltage change in a modulation signal; amplifying said oscillation signal with an amplifier; supplying power to said amplifier, the start of power supply to said amplifier causing said frequency fluctuation; and responsive to the start of said power supply to said amplifier, changing the voltage of said modulation signal so that said frequency fluctuation is depressed.
Claim 15
Independent Claim
94 words
A method of depressing frequency fluctuation in the output of an oscillator circuit, comprising the following steps of: generating an oscillation signal with said oscillator circuit, the frequency of said oscillation signal being changed in response to a voltage change in a modulation signal; amplifying said oscillation signal with an amplifier; supplying power to said amplifier, the start of power supply to said amplifier causing said frequency fluctuation; and responsive to the start of said power supply to said amplifier, changing the voltage of said modulation signal so that said frequency fluctuation is depressed.
Claim 16
Dependent Claim
51 words
A method as claimed in claim 10, wherein said step of generating an oscillation signal comprises the steps of: producing a reference signal; comparing the phases of said reference and oscillation signals to produce a phase error signal; and responsive to said modulation and phase error signals, producing said oscillation signal.
Claim 17
Dependent Claim
26 words
A method as claimed in claim 10 further comprising the step of, responsive to a control signal, switching on and off power supply to said amplifier.
Claim 18
Dependent Claim
47 words
A method as claimed in claim 12, wherein said step of changing the voltage of said modulation signal comprises the step of, responsive to a voltage change of said control signal, producing a voltage change in said modulation signal so that said frequency fluctuation can be depressed.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-06-04 | 1993-12-04 | 1994-06-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-06-04 | 1997-12-04 | 1998-06-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-06-04 | 2001-12-04 | 2002-06-05 | $7700.00 | Window Closed / Lapsed |