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US4931995A Expired / Lapsed US ⏱️ 0.0 years remaining

Writing method in DRAM

Assignee: Mitsubishi Electric Corp
•
Filing: 1988-10-27
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Granted: 1990-06-05
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Expires: 2008-10-27
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Abstract

Abstract A data writing method in a DRAM comprises the steps of bringing a row address strobe input signal into an enabling state and successively changing a signal indicative of a row address while the row address strobe input signal is in the enabling state, thereby to write data successively into a plurality of memory cells designated by the row addresses.

Inventors

  • 👤 Yasuhiko Okasaka
  • 👤 Toshiyuki Ogawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 23:18
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/409; G11C11/4096

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 64 words
A data writing method in a DRAM, comprising the steps of: bringing a row address strobe input signal into an enabling state, and successively changing a signal indicative of a row address a plurality of times while said row address strobe input signal is in the enabling state, thereby to write data successively into a plurality of memory cells designated by said row addresses.
Claim 2
Dependent Claim 64 words
A data writing method in a DRAM, comprising the steps of: bringing a row address strobe input signal into an enabling state, and successively changing a signal indicative of a row address a plurality of times while said row address strobe input signal is in the enabling state, thereby to write data successively into a plurality of memory cells designated by said row addresses.
Claim 3
Dependent Claim 137 words
In a method for writing data in a DRAM, including the steps of bringing a row address strobe input signal to an enabling state, changing a row address signal indicative of an address of a row for writing the data, enabling one of a plurality of word lines in accordance with the row address for writing the data, and activating a sense amplifier, the improvement comprising the steps of: changing said row address signal a plurality of times during a single enabled state of the row address strobe signal, and maintaining data on bit lines throughout the enabled state of the row address strobe, thereby writing said data into a plurality of rows each having a different row address during a single enabled state of the row address input signal and increasing operational speed of the DRAM.
Claim 4
Dependent Claim 137 words
In a method for writing data in a DRAM, including the steps of bringing a row address strobe input signal to an enabling state, changing a row address signal indicative of an address of a row for writing the data, enabling one of a plurality of word lines in accordance with the row address for writing the data, and activating a sense amplifier, the improvement comprising the steps of: changing said row address signal a plurality of times during a single enabled state of the row address strobe signal, and maintaining data on bit lines throughout the enabled state of the row address strobe, thereby writing said data into a plurality of rows each having a different row address during a single enabled state of the row address input signal and increasing operational speed of the DRAM.
Claim 5
Dependent Claim 45 words
The improved method of claim 2, comprising the further step of activating a sense amplifier for a period of time substantially equal to the time during which the row address strobe input signal is enabled, thereby reducing power supply current requirements for operating the DRAM.
Claim 6
Dependent Claim 118 words
In a method for writing data in a DRAM, including the steps of bringing a row address strobe input signal to an enabling state, changing a row address signal indicative of an address of a row for writing the data, enabling a word line in accordance with the row address for writing the data, and activating a sense amplifier, the improvement comprising the steps of: changing said row address signal a plurality of times during a single enabled state of the row address strobe signal, and thereby writing data into a plurality of rows each having a different row address during a single enabled state of the row address input signal and increasing operational speed of the DRAM.
Claim 7
Dependent Claim 118 words
In a method for writing data in a DRAM, including the steps of bringing a row address strobe input signal to an enabling state, changing a row address signal indicative of an address of a row for writing the data, enabling a word line in accordance with the row address for writing the data, and activating a sense amplifier, the improvement comprising the steps of: changing said row address signal a plurality of times during a single enabled state of the row address strobe signal, and thereby writing data into a plurality of rows each having a different row address during a single enabled state of the row address input signal and increasing operational speed of the DRAM.
Claim 8
Dependent Claim 45 words
The improved method of claim 4, comprising the further step of activating a sense amplifier for a period of time substantially equal to the time during which the row address strobe input signal is enabled, thereby reducing power supply current requirements for operating the DRAM.
Claim 9
Dependent Claim 120 words
In a method for writing data in a DRAM, including the steps of bringing a row address strobe input signal to an enabling state, changing a row address signal indicative of an address of a row for writing the data, enabling one of a plurality of word lines in accordance with the row address for writing the data, and activating a sense amplifier, the improvement comprising increasing a writing speed in the DRAM by performing the steps of: precharging said bit lines only once, causing said sense amplifiers to maintain data applied to said bit lines, and while said sense amplifiers maintain said data on said bit lines, changing signals applied to said word lines, thereby increasing said writing speed.
Claim 10
Dependent Claim 120 words
In a method for writing data in a DRAM, including the steps of bringing a row address strobe input signal to an enabling state, changing a row address signal indicative of an address of a row for writing the data, enabling one of a plurality of word lines in accordance with the row address for writing the data, and activating a sense amplifier, the improvement comprising increasing a writing speed in the DRAM by performing the steps of: precharging said bit lines only once, causing said sense amplifiers to maintain data applied to said bit lines, and while said sense amplifiers maintain said data on said bit lines, changing signals applied to said word lines, thereby increasing said writing speed.
Claim 11
Dependent Claim 187 words
In a method for writing data in a DRAM, including the steps of bringing a row address strobe input signal to an enabling state, changing a row address signal indicative of an address of a row for writing the data, enabling one of a plurality of word lines in accordance with the row address for writing the data, and activating a sense amplifier, the improvement comprising the steps of: changing said address of a row for writing the data represented by said row address signal a plurality of times during a single enabled state of the row address strobe signal, and maintaining data on bit lines throughout the enabled state of the row address strobe, said step of maintaining said data on said bit lines including the steps of precharging said bit lines only once and changing signals applied to said word lines while said sense amplifier maintains said data on said bit lines, thereby writing said data into a plurality of rows each having a different row address during a single enabled state of the row address input signal and increasing operational speed of the DRAM.
Claim 12
Dependent Claim 187 words
In a method for writing data in a DRAM, including the steps of bringing a row address strobe input signal to an enabling state, changing a row address signal indicative of an address of a row for writing the data, enabling one of a plurality of word lines in accordance with the row address for writing the data, and activating a sense amplifier, the improvement comprising the steps of: changing said address of a row for writing the data represented by said row address signal a plurality of times during a single enabled state of the row address strobe signal, and maintaining data on bit lines throughout the enabled state of the row address strobe, said step of maintaining said data on said bit lines including the steps of precharging said bit lines only once and changing signals applied to said word lines while said sense amplifier maintains said data on said bit lines, thereby writing said data into a plurality of rows each having a different row address during a single enabled state of the row address input signal and increasing operational speed of the DRAM.
Claim 13
Dependent Claim 124 words
In a method for writing data in a DRAM, including steps of bringing a row address strobe input signal to an enabling state, changing a row address signal indicative of an address of a row for writing the data, enabling one of a plurality of word lines in accordance with the row address for writing the data, and activating a sense amplifier, the improvement comprising increasing a writing speed in the DRAM by performing the steps of: precharging said bit lines only once, causing said sense amplifiers to maintain data applied to said bit lines, and while said sense amplifiers maintain said data on said bit lines, changing enabling signals applied to said word lines a plurality of times, thereby increasing said writing speed.
Claim 14
Dependent Claim 124 words
In a method for writing data in a DRAM, including steps of bringing a row address strobe input signal to an enabling state, changing a row address signal indicative of an address of a row for writing the data, enabling one of a plurality of word lines in accordance with the row address for writing the data, and activating a sense amplifier, the improvement comprising increasing a writing speed in the DRAM by performing the steps of: precharging said bit lines only once, causing said sense amplifiers to maintain data applied to said bit lines, and while said sense amplifiers maintain said data on said bit lines, changing enabling signals applied to said word lines a plurality of times, thereby increasing said writing speed.

References Cited (Backward Citations)

US4575825A Cited
US4596004A Cited
US4764901A Cited
US4685089A Cited
US4811299A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-06-04 1993-12-04 1994-06-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-06-04 1997-12-04 1998-06-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-06-04 2001-12-04 2002-06-05 $7700.00 Window Closed / Lapsed

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