Method and device for image reduction in image processing

Claim 1

In an image processing in which a given original image is read out to obtain a brightness matrix pattern composed of pixels representing brightness at each picture elements of the read out image defined in a matrix and said brightness at each pixel of the read-out image is sequentially compared with dither element values of a predetermined n×n dither matrix pattern, a method of image reduction for reducing said read-out image at a 1/m reduction rate, comprising the steps of: deriving an mn×mn dither pattern composed of n×n dither element values defined in a matrix from said n×n dither matrix pattern; comparing brightness of each pixel of said read-out image with dither element values prescribed in said mn×mn dither pattern at a pixel corresponding to that of said read-out image to obtain an intermediate dither image having a plurality of unit matrices; and extracting brightness features of the respective unit matrices in said intermediate dither image to obtain a reduced image represented by said brightness features corresponding to said original image.

Claim 3

A device for image processing capable of reducing a read-out image obtained in a matrix by digitizing a given original image in accordance with a predetermined n×n dither pattern, comprising: a dither setting circuit having said n×n dither pattern composed of dither element values with which picture elements constituting the matrix of said read-out image are compared to obtain an intermediate dither image; a mode selection circuit for selecting one of at least equality and reducing modes; a subscanning encoder which is adapted to output one subscanning encoder pulse each time updating of subscanning; a timing pulse generator for outputting regularly timing pulses; and a scanning control circuit for outputting said dither element values so that when said mode selection circuit selects the image reducing mode at a 1/m reduction rate, one dither element value is delivered each time m-subscanning encoder pulses from said subscanning encoder or m-timing pulses from said timing pulse generator are outputted.

Claim 4

A device for image processing capable of reducing a read-out image obtained in a matrix by digitizing a given original image in accordance with a predetermined n×n dither pattern, comprising: a dither setting circuit having said n×n dither pattern composed of dither element values with which picture elements constituting the matrix of said read-out image are compared to obtain an intermediate dither image; a mode selection circuit for selecting one of at least equality and reducing modes; a subscanning encoder which is adapted to output one subscanning encoder pulse each time updating of subscanning; a timing pulse generator for outputting regularly timing pulses; and a scanning control circuit for outputting said dither element values so that when said mode selection circuit selects the image reducing mode at a 1/m reduction rate, one dither element value is delivered each time m-subscanning encoder pulses from said subscanning encoder or m-timing pulses from said timing pulse generator are outputted.

Claim 5

A device for image processing capable of reducing a read-out image obtained in a matrix by digitizing a given original image in accordance with a predetermined n×n dither pattern, comprising: a subscanning encoder for outputting a subscanning encoder pulse each time updating of subscanning; a timing pulse generator for outputting regularly timing pulses; a dither setting circuit having the dither pattern with dither element values with which picture elements constituting the matrix of said read-out image are compared to obtain an intermediate dither image; a mode selection circuit for selecting one of at least equality and reducing modes; a scanning control circuit for outputting said dither element values so that when said mode selection circuit selects the image reducing mode at a 1/m reduction rate, one dither element value is delivered each time m-subscanning encoder pulses from said subscanning encoder or m-timing pulses from said timing pulse generator are outputted so as to derive an mn×mn dither pattern composed of n×n dither element values defined in a matrix from said n×n dither matrix pattern; a dither matrix resistance circuit having a plurality of resistors for obtaining said intermediate dither image; and a dither decision circuit for selecting said resistors of said dither matrix resistance circuit in accordance with the dither pattern, whereby a reduced image represented by said brightness features corresponding to said original image is obtained by comparing brightness of each pixel of said read-out image with said dither element values prescribed in said mn×mn dither pattern at a pixel corresponding to that of said read-out image to obtain said intermediate dither image having a plurality of unit matrices and extracting brightness features of the respective unit matrices in said intermediate dither image.

Claim 6

A device for image processing capable of reducing a read-out image obtained in a matrix by digitizing a given original image in accordance with a predetermined n×n dither pattern, comprising: a subscanning encoder for outputting a subscanning encoder pulse each time updating of subscanning; a timing pulse generator for outputting regularly timing pulses; a dither setting circuit having the dither pattern with dither element values with which picture elements constituting the matrix of said read-out image are compared to obtain an intermediate dither image; a mode selection circuit for selecting one of at least equality and reducing modes; a scanning control circuit for outputting said dither element values so that when said mode selection circuit selects the image reducing mode at a 1/m reduction rate, one dither element value is delivered each time m-subscanning encoder pulses from said subscanning encoder or m-timing pulses from said timing pulse generator are outputted so as to derive an mn×mn dither pattern composed of n×n dither element values defined in a matrix from said n×n dither matrix pattern; a dither matrix resistance circuit having a plurality of resistors for obtaining said intermediate dither image; and a dither decision circuit for selecting said resistors of said dither matrix resistance circuit in accordance with the dither pattern, whereby a reduced image represented by said brightness features corresponding to said original image is obtained by comparing brightness of each pixel of said read-out image with said dither element values prescribed in said mn×mn dither pattern at a pixel corresponding to that of said read-out image to obtain said intermediate dither image having a plurality of unit matrices and extracting brightness features of the respective unit matrices in said intermediate dither image.