Non-volatile semiconductor memory device and method of the manufacture thereof

Claim 1

A non-volatile memory device comprising: first semiconductor region of a first conductivity type; a groove formed in said first semiconductor region to extend in a predetermined direction; insulating separation regions formed to selectively fill the inside of said groove so that said groove is divided into a plurality of groove portions; a second semiconductor region of a second conductivity type formed in a surface of said first semiconductor region and serving as a source region; a pair of first gate insulating layers formed on opposed side walls of a groove portion of said plurality of groove portions defined by said insulating separation regions and said first semiconductor region, said side walls extending along the direction of extension of said groove; a pair of floating gate electrodes formed on surfaces of said first gate insulating layers opposite to surfaces of said first gate insulating layers contacting said side walls of said groove portion, with said floating gate electrodes having tops on a plane different from a plane of a top of said second semiconductor region; a pair of second gate insulating layers formed on surfaces of said floating gate electrodes opposite to surfaces thereof contacting said first gate insulating layers; a pair of control gate electrodes formed on surfaces of said second gate insulating layers opposite to surfaces thereof contacting said floating gate electrodes; a third semiconductor region of said second conductivity type formed in a surface region of said first semiconductor region and located at a bottom of said groove portion, said third semiconductor region serving as a drain region; and a fourth semiconductor region formed within said groove portion and contacting said third semiconductor region, said fourth semiconductor region being doped with impurities of said second conductivity type.