US4929833A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Feedback stabilized digital infrared detector circuit
Assignee: Philips Communication Security and Imaging Inc
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Filing: 1989-03-17
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Granted: 1990-05-29
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Expires: 2009-03-17
Abstract
Abstract A digital infrared detector circuit which converts changes in detector current to time varying pulses and uses feedback to adjust the coincidence of a reference signal with the trigger signal to accommodate to circuit variations caused by changes in infrared detector sensitivity or ambient temperature. To supply a highly accurate feedback reference signal an internal high frequency oscillator is used for feedback control and counted down to furnish the reference signal. The conversion from detector current to time is accomplished by using the detector to discharge an accurately charged capacitor and measuring the time to recharge the capacitor.
Inventors
- 👤 Edgar M. Smith
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 16:46
CPC Classifications
G; G08; G08B; G08B13/00; G08B13/18; G08B13/189; G08B13/19; Y; Y10; Y10S; Y10S250/00; Y10S250/01
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
317 words
A digital control circuit operated by changes of radiation received by an infrared detector comprising: an infrared detector with first and second terminals which varies the current flowing through it based upon variations of radiation within its field of view with its first terminal interconnected with a circuit return; a first capacitor with first and second terminals the first terminal being connected to the second terminal of the infrared detector; a diode with a positive and a negative terminal and its negative terminal connected to the junction of the first capacitor and the infrared detector; a digital clock generator generating a clock pulse; a sample pulse generator connected to the output of the clock generator and generating a sample pulse synchronized to the clock pulse, the sample pulse being of sufficient voltage, current and pulse length to charge the first capacitor to a measurable voltage during the sample pulse length, and the sample generator pulse output being connected to the positive terminal of the diode; a first logic circuit, with an input and an output, which generates an output pulse on its output when the voltage on its input is raised to a specific level, the input of the first logic circuit being connected to the positive terminal of the diode and the output being interconnected with the second capacitor terminal; a reference pulse generator connected to the output of the clock generator and synchronized with the sample pulse generator, the reference pulse generator producing a reference pulse which begins during the sample pulse; and a trigger circuit, one input connected to the output of the reference pulse generator and another input to the output of the first logic circuit, the trigger circuit generating a signal on a first output to activate an external control circuit when the reference pulse and the output of the first logic circuit deviate in time by more than a preselected amount.
Claim 2
Dependent Claim
317 words
A digital control circuit operated by changes of radiation received by an infrared detector comprising: an infrared detector with first and second terminals which varies the current flowing through it based upon variations of radiation within its field of view with its first terminal interconnected with a circuit return; a first capacitor with first and second terminals the first terminal being connected to the second terminal of the infrared detector; a diode with a positive and a negative terminal and its negative terminal connected to the junction of the first capacitor and the infrared detector; a digital clock generator generating a clock pulse; a sample pulse generator connected to the output of the clock generator and generating a sample pulse synchronized to the clock pulse, the sample pulse being of sufficient voltage, current and pulse length to charge the first capacitor to a measurable voltage during the sample pulse length, and the sample generator pulse output being connected to the positive terminal of the diode; a first logic circuit, with an input and an output, which generates an output pulse on its output when the voltage on its input is raised to a specific level, the input of the first logic circuit being connected to the positive terminal of the diode and the output being interconnected with the second capacitor terminal; a reference pulse generator connected to the output of the clock generator and synchronized with the sample pulse generator, the reference pulse generator producing a reference pulse which begins during the sample pulse; and a trigger circuit, one input connected to the output of the reference pulse generator and another input to the output of the first logic circuit, the trigger circuit generating a signal on a first output to activate an external control circuit when the reference pulse and the output of the first logic circuit deviate in time by more than a preselected amount.
Claim 3
Dependent Claim
29 words
The digital control circuit of claim 1 wherein the interconnection between the output terminal of the first logic circuit and the second capacitor terminal is a second logic circuit.
Claim 4
Dependent Claim
52 words
The digital control circuit of claim 1 wherein the interconnection between the infrared detector and the circuit return is a feedback control circuit which varies the infrared detector current based on the time deviation between the reference pulse and the output of the first logic circuit when the infrared detector is quiescent.
Claim 5
Dependent Claim
48 words
The digital control circuit of claim 1 wherein the interconnection between the infrared detector and the circuit return is a resistor and a second capacitor in parallel and a feedback control voltage is fed to the junction of the infrared detector and the parallel resistor and second capacitor.
Claim 6
Dependent Claim
94 words
The digital control circuit of claim 1 further including a feedback circuit stabilizing the infrared detector, the feedback circuit comprising: a parallel resistor and a second capacitor interconnecting the infrared detector and the circuit return; and a second output from the trigger circuit which generates a second output pulse the length of which varys with the deviation in time between the reference pulse and the output of the first logic circuit, the second output of the trigger circuit being interconnected with the junction of the infrared detector and the parallel resistor and second capacitor.
Claim 7
Dependent Claim
31 words
The digital control circuit of claim 5 further including a resistor and capacitor charging circuit inserted between the trigger circuit and the infrared detector and the parallel resistor and second capacitor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-05-28 | 1993-11-27 | 1994-05-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-05-28 | 1997-11-27 | 1998-05-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-05-28 | 2001-11-27 | 2002-05-29 | $7700.00 | Window Closed / Lapsed |