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US4928154A Expired / Lapsed US ⏱️ 0.0 years remaining

Epitaxial gallium arsenide semiconductor on silicon substrate with gallium phosphide and superlattice intermediate layers

Assignee: Daido Steel Co Ltd
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Filing: 1989-03-20
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Granted: 1990-05-22
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Expires: 2009-03-20
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Abstract

Abstract A semiconductor wafer having an epitaxial GaAs layer, including a monocrystalline Si substrate having a major surface which is inclined at an off angle between 0.5 DEG and 5 DEG with respect to (100); and at least one intermediate layer epitaxially grown on the major surface of the monocrystalline Si substrate, as a buffer layer for accommodating a lattice mismatch between the Si substrate and the epitaxial GaAs layer which is epitaxially grown on a major surface of a top layer of the at least one intermediate layer. The at least one intermediate layer may comprise one or more GaP/GaAsP, GaAsP/GaAs superlattice layers. The wafer may be used to produce a semiconductor light emitting element which has a plurality of crystalline GaAs layers including a light emitting layer epitaxially grown on the GaAs layer on the intermediate layer. The wafer may also be used to produce a compound semiconductor device such as amplifying and switching elements, light emitting and receiving elements and photovolataic elements. Methods for producing the semiconductor wafer, light emitting element and compound semiconductor devices are also disclosed.

Inventors

  • 👤 Masayoshi Umeno
  • 👤 Shiro Sakai
  • 👤 Shinichiro Yahagi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 20:39
CPC Classifications
H; H10; H10F; H10F10/00; H10F10/10; H10F10/14; H10F10/144; H10D; H10D62/00; H10D62/40; H10D62/405; H10D62/80; H10D62/82; H10F30/00; H10F30/20; H10F30/21; H10F30/22; H10F30/223; H10F71/00; H10F71/127; H10H; H10H20/00; H10H20/01; H10H20/011; H10H20/013; H10H20/0133; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/2926; H10P14/32; H10P14/3202; H10P14/3214; H10P14/3218; H10P14/3221; H10P14/3242; H10P14/3244; H10P14/3251; H10P14/3252; H10P14/34; H10P14/3402; H10P14/3414; H10P14/3421; H10P14/3438; H10P14/3441; Y; Y02; Y02E; Y02E10/00; Y02E10/50; Y02E10/544; Y10; Y10S; Y10S117/00; Y10S117/901; Y10S117/902; Y10S148/00; Y10S148/072; Y10S148/097; Y10S148/16; Y10S438/00; Y10S438/933; Y10S438/938

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 135 words
A semiconductor wafer having an epitaxial GaAs layer, comprising: a monocrystalline Si substrate; and at least one intermediate layer epitaxially grown on a major surface of said monocrystalline Si substrate, as a buffer layer for accommodating a lattice mismatch between said Si substrate and said epitaxial GaAs layer; said at least one intermediate layer consisting of: a GaP layer formed on said Si substrate; a GaP/GaAsP superlattice formed on said GaP layer; and a GaAsP/GaAs superlattice formed on said GaP/GaAsP superlattice, said epitaxial GaAs layer being formed on said GaAsP/GaAs superlattice, wherein said GaP layer has a greater thickness than the total thickness of said superlattices; and said GaP/GaAsP superlattice and said GaAsP/GaAs superlattice having an average lattice constant between the lattice constant of said Si substrate and the lattice constant of said GaAs layer.
Claim 2
Dependent Claim 135 words
A semiconductor wafer having an epitaxial GaAs layer, comprising: a monocrystalline Si substrate; and at least one intermediate layer epitaxially grown on a major surface of said monocrystalline Si substrate, as a buffer layer for accommodating a lattice mismatch between said Si substrate and said epitaxial GaAs layer; said at least one intermediate layer consisting of: a GaP layer formed on said Si substrate; a GaP/GaAsP superlattice formed on said GaP layer; and a GaAsP/GaAs superlattice formed on said GaP/GaAsP superlattice, said epitaxial GaAs layer being formed on said GaAsP/GaAs superlattice, wherein said GaP layer has a greater thickness than the total thickness of said superlattices; and said GaP/GaAsP superlattice and said GaAsP/GaAs superlattice having an average lattice constant between the lattice constant of said Si substrate and the lattice constant of said GaAs layer.
Claim 3
Dependent Claim 153 words
A semiconductor wafer having an epitaxial GaAs layer, comprising: a monocrystalline Si substrate having a major surface which is inclined at an off angle between 0.05° and 5° with respect to (100); at least one intermediate layer epitaxially grown on said major surface of said monocrystalline Si substrate, as a buffer layer for accommodating a lattice mismatch between said Si substrate and said epitaxial GaAs layer; said at least one intermediate layer consisting essentially of a GaP layer formed on said Si substrate, a GaP/GaAsP superlattice formed on said GaP layer, and a GaAsP/GaAs superlattice on said GaP/GaAsP superlattice, said epitaxial GaAs layer being formed on said GaAsP/GaAs superlattice, wherein said GaP layer has a greater thickness than the total thickness of said superlattices; and said GaP/GaAsP superlattice and said GaAsP/GaAs superlattice having an average lattice constant between the lattice constant of said Si substrate and the lattice constant of said GaAs layer.
Claim 4
Dependent Claim 153 words
A semiconductor wafer having an epitaxial GaAs layer, comprising: a monocrystalline Si substrate having a major surface which is inclined at an off angle between 0.05° and 5° with respect to (100); at least one intermediate layer epitaxially grown on said major surface of said monocrystalline Si substrate, as a buffer layer for accommodating a lattice mismatch between said Si substrate and said epitaxial GaAs layer; said at least one intermediate layer consisting essentially of a GaP layer formed on said Si substrate, a GaP/GaAsP superlattice formed on said GaP layer, and a GaAsP/GaAs superlattice on said GaP/GaAsP superlattice, said epitaxial GaAs layer being formed on said GaAsP/GaAs superlattice, wherein said GaP layer has a greater thickness than the total thickness of said superlattices; and said GaP/GaAsP superlattice and said GaAsP/GaAs superlattice having an average lattice constant between the lattice constant of said Si substrate and the lattice constant of said GaAs layer.
Claim 5
Dependent Claim 181 words
A semiconductor light emitting element having an epitaxial GaAs layer, comprising: a monocrystalline Si substrate; at least one intermediate layer having at least one superlattice and epitaxially grown on a major surface of said monocrystalline Si substrate, as a buffer layer for accommodating a lattice mismatch between said Si substrate and said epitaxial GaAs layer; said at least one intermediate layer consisting essentially of a GaP layer formed on said Si substrate, a GaP/GaAsP superlattice formed on said GaP layer, and a GaAsP/GaAs superlattice formed on said GaP/GaAsP superlattice, said epitaxial GaAs layer being formed on said GaAsP/GaAs superlattice, wherein said GaP layer has a greater thickness than the total thickness of said superlattices; said GaP/GaAsP superlattice and said GaAsP/GaAs superlattice having an average lattice constant between the lattice constant of said Si substrate and the lattice constant of said GaAs layer; and a plurality of semiconductor crystalline layers whose major elements include Ga and As, said semiconductor crystalline layers being epitaxially grown on said epitaxial GaAs layer and superposed on each other, said crystalline layers including a light emitting layer.
Claim 6
Dependent Claim 181 words
A semiconductor light emitting element having an epitaxial GaAs layer, comprising: a monocrystalline Si substrate; at least one intermediate layer having at least one superlattice and epitaxially grown on a major surface of said monocrystalline Si substrate, as a buffer layer for accommodating a lattice mismatch between said Si substrate and said epitaxial GaAs layer; said at least one intermediate layer consisting essentially of a GaP layer formed on said Si substrate, a GaP/GaAsP superlattice formed on said GaP layer, and a GaAsP/GaAs superlattice formed on said GaP/GaAsP superlattice, said epitaxial GaAs layer being formed on said GaAsP/GaAs superlattice, wherein said GaP layer has a greater thickness than the total thickness of said superlattices; said GaP/GaAsP superlattice and said GaAsP/GaAs superlattice having an average lattice constant between the lattice constant of said Si substrate and the lattice constant of said GaAs layer; and a plurality of semiconductor crystalline layers whose major elements include Ga and As, said semiconductor crystalline layers being epitaxially grown on said epitaxial GaAs layer and superposed on each other, said crystalline layers including a light emitting layer.
Claim 7
Dependent Claim 32 words
A semiconductor light emitting element according to claim 3, wherein said major surface of said monocrystalline Si substrate is inclined at an off angle between 0.5° and 5° with respect to (100).
Claim 8
Dependent Claim 28 words
A semiconductor light emitting element according to claim 3, wherein said light emitting layer consists of a semiconductor crystalline layer whose major elements include Al, Ga and As.
Claim 9
Dependent Claim 178 words
A compound semiconductor device having an epitaxial GaAs layer, comprising: a monocrystalline Si substrate having a major surface which is inclined at an off angle between 0.5° and 5° with respect to (100); at least one intermediate layer including at least one superlattice epitaxially grown on said major surface of said monocrystalline Si substrate, as a buffer layer for accommodating a lattice mismatch between said Si substrate and said epitaxial GaAs layer; said at least one intermediate layer consisting essentially of a GaP layer formed on said Si substrate, a GaP/GaAsP superlattice formed on said GaP layer, and a GaAsP/GaAs superlattice formed on said GaP/GaAsP superlattice, said epitaxial GaAs layer being formed on said GaAsP/GaAs superlattice, wherein said GaP layer has a greater thickness than the total thickness of said superlattices; said GaP/GaAsP superlattice and said GaAsP/GaAs superlattice having an average lattice constant between the lattice constant of said Si substrate and the lattice constant of said GaAs layer; and at least one semiconductor element formed on said epitaxial GaAs layer on said at least one intermediate layer.
Claim 10
Dependent Claim 178 words
A compound semiconductor device having an epitaxial GaAs layer, comprising: a monocrystalline Si substrate having a major surface which is inclined at an off angle between 0.5° and 5° with respect to (100); at least one intermediate layer including at least one superlattice epitaxially grown on said major surface of said monocrystalline Si substrate, as a buffer layer for accommodating a lattice mismatch between said Si substrate and said epitaxial GaAs layer; said at least one intermediate layer consisting essentially of a GaP layer formed on said Si substrate, a GaP/GaAsP superlattice formed on said GaP layer, and a GaAsP/GaAs superlattice formed on said GaP/GaAsP superlattice, said epitaxial GaAs layer being formed on said GaAsP/GaAs superlattice, wherein said GaP layer has a greater thickness than the total thickness of said superlattices; said GaP/GaAsP superlattice and said GaAsP/GaAs superlattice having an average lattice constant between the lattice constant of said Si substrate and the lattice constant of said GaAs layer; and at least one semiconductor element formed on said epitaxial GaAs layer on said at least one intermediate layer.
Claim 11
Dependent Claim 59 words
A compound semiconductor device according to claim 6, wherein said at least one semiconductor element comprises at least one of elements selected from the group consisting of: amplifying and/or switching elements including bi-polar transistors and field effect transistors; light emitting elements including light emitting diodes and laser diodes; light receiving elements including phototransistors; and photovoltaic elements including solar cells.

References Cited (Backward Citations)

US4088515A Cited
US4120706A Cited
US4675709A Cited
US4561916A Cited
US4632712A Cited
US4558336A Cited
EP0177903A2 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-05-21 1993-11-20 1994-05-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-05-21 1997-11-20 1998-05-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-05-21 2001-11-20 2002-05-22 $7700.00 Window Closed / Lapsed

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