Claim 1
Independent Claim
150 words
An image display apparatus having a plurality of color factors constituting each pixel on a character image and a graphic image, wherein each respective corresponding pixel is expressed by logical values, wherein the logical values of the color factors of the corresponding pixel on the character image and the graphic image are logically operated, and a composite image of the character image and the graphic image is expressed, the image display apparatus, comprising: a logical operation circuit means, including a means for preventing the display of a color factor on the graphic image of a pixel when at least one color factor on the character image exists for the pixel; and a means for preventing the display of a color factor on the character image when the color factor constituting the pixel of the character image is identical to the color factor constituting the corresponding pixel of the graphic image.
Claim 2
Dependent Claim
150 words
An image display apparatus having a plurality of color factors constituting each pixel on a character image and a graphic image, wherein each respective corresponding pixel is expressed by logical values, wherein the logical values of the color factors of the corresponding pixel on the character image and the graphic image are logically operated, and a composite image of the character image and the graphic image is expressed, the image display apparatus, comprising: a logical operation circuit means, including a means for preventing the display of a color factor on the graphic image of a pixel when at least one color factor on the character image exists for the pixel; and a means for preventing the display of a color factor on the character image when the color factor constituting the pixel of the character image is identical to the color factor constituting the corresponding pixel of the graphic image.
Claim 3
Dependent Claim
450 words
An image display apparatus as set forth in claim 1, wherein the logical values of the color factors on the character image and the graphic image are expressed as logical values for red, green, and blue, and wherein the logical operation circuit means comprises: a three-input OR gate for receiving a logical value of the red, a logical value of the green, and a logical value of the blue on the character image, a first two-input AND gate receiving an inverted output of the three-input OR gate and a logical value of the red on the graphic image, a second two-input AND gate for receiving the inverted output of the three-input OR gate and a logical value of the green on the graphic image, a third two-input AND gate for receiving the inverted output of the three-input OR gate and a logical value of the blue on the graphic image, a first two-input OR gate for receiving a logical value of the red on the character image and an output of the first two-input AND gate, a second two-input OR gate for receiving a logical value of the green on the character image and an output of the second two-input AND gate, a third two-input OR gate for receiving a logical value of the blue on the character image and an output of the third two-input AND gate, a first four-input AND gate for receiving a logical value of the red on the character image, a logical value of the red on the graphic image, an inverted logical value of the green on the graphic image, and an inverted logical value of the blue on the graphic image, a second four-input AND gate for receiving a logical value of the green on the character image, a logical value of the green on the graphic image, an inverted logical value of the red on the graphic image, an inverted logical value of the blue on the graphic image, a third four-input AND gate for receiving a logical value of the blue on the character image, a logical value of the blue on the graphic image, an inverted logical value of the green on the graphic image, and an inverted logical value of the red on the graphic image, a first exclusive OR gate for receiving an output of the first two-input OR gate and an output of the first four-input AND gate, a second exclusive OR gate for receiving an output of the second two-input OR gate and an output of the second four-input AND gate, and a third exclusive OR gate for receiving an output of the third two-input OR gate and an output of the third four-input AND gate.