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US4924205A Expired / Lapsed US ⏱️ 0.0 years remaining

Chip resistor and method of manufacturing a chip resistor

Assignee: Phycomp Holding BV
•
Filing: 1989-01-10
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Granted: 1990-05-08
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Expires: 2009-01-10
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Abstract

Abstract A chip resistor comprising a cuboid resistor body of a ceramic material and solderable, metal, current-supply strips at a first pair of opposing side faces of the resistor body, can readily and accurately be manufactured in that a second pair of opposing side faces of the resistor body is covered completely with electrically insulating layers and in that the metal strips around the edges of the resistor body in such a way that the electrically insulating layers are partly covered by the metal strips.

Inventors

  • 👤 Didier Y. F. Caporali
  • 👤 Frans L. A. Geernickx

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 10:21
CPC Classifications
H; H01; H01C; H01C17/00; H01C17/006; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49082

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 72 words
A chip resistor comprising of cuboid ceramic resistor body, electrically insulating layers completely covering a first pair of opposing side faces of said resistor body, and metal current-supply strips provided on a second pair of opposing side faces of said resistor body and extending over the edges of said first pair of opposing side faces covered with layers of said electrically insulating layers so as to partially cover said electrically insulating layers.
Claim 2
Dependent Claim 72 words
A chip resistor comprising of cuboid ceramic resistor body, electrically insulating layers completely covering a first pair of opposing side faces of said resistor body, and metal current-supply strips provided on a second pair of opposing side faces of said resistor body and extending over the edges of said first pair of opposing side faces covered with layers of said electrically insulating layers so as to partially cover said electrically insulating layers.
Claim 3
Independent Claim 119 words
A method of manufacturing a chip resistor in which a cuboid resistor body is provided on two opposing side faces with metal current-supply strips, said method comprising the steps: (a) providing both surfaces of a plate of a ceramic resistance body with electrically insulating layers, (b) dividing said plate into first strips, (c) immersing said strips into a composition capable of providing solderable metal strips on said first strips in a manner such that said metal strips are provided on the large uninsulated sides of the strips while extending over the edges of said electrically insulating layers so as to partially cover said electrically insulating layers, and (d) dividing said strips, provided with the solderable metal layers, into cuboids.
Claim 4
Independent Claim 119 words
A method of manufacturing a chip resistor in which a cuboid resistor body is provided on two opposing side faces with metal current-supply strips, said method comprising the steps: (a) providing both surfaces of a plate of a ceramic resistance body with electrically insulating layers, (b) dividing said plate into first strips, (c) immersing said strips into a composition capable of providing solderable metal strips on said first strips in a manner such that said metal strips are provided on the large uninsulated sides of the strips while extending over the edges of said electrically insulating layers so as to partially cover said electrically insulating layers, and (d) dividing said strips, provided with the solderable metal layers, into cuboids.
Claim 5
Dependent Claim 19 words
A chip resistor as claimed in claim 1, wherein the electrically insulating layers are made of a ceramic material.
Claim 6
Dependent Claim 27 words
A method as claimed in claim 2, wherein lines of fracture are provided on the surface of the plate after the electrically insulating layers have been applied.

References Cited (Backward Citations)

US2253376A Cited
US2253360A Cited
US4786888A Cited
US4706060A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-05-07 1993-11-06 1994-05-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-05-07 1997-11-06 1998-05-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-05-07 2001-11-06 2002-05-08 $7700.00 Window Closed / Lapsed

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